Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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extracting FPGA context

Altera_Forum
Honored Contributor II
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Hello, 

 

I have a problem in my project, I try to extract a context from a FPGA in order to start the simulation with it. 

 

More precisely, I'm able to save the RAM data into a file and initialize the simulation model with them. 

 

But I don't find a way to identify and save the value of all the register (flip-flop input and output of combinatory part) present within the FPGA into a file and start the simulation with this context (initialize the simulation model of all the FPGA). 

 

Somone could help me? 

 

THX
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Altera_Forum
Honored Contributor II
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You can directly extract the state of all the FPGA registers. If you used the correct setting, you can read the embedded RAM blocks from the memory contents editor, but for all the regular signals, you can only read them if you included them as signaltap probes.

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