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how to calculate sin inverse (ARCSIN) in VHDL?

Altera_Forum
Honored Contributor II
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I am using altera de0 nano soc fpga, and quartus 16.1 lite edition. I found that to calculate sin, cos and atan Altera's CORDIC IP core can be used.or lookup table (LUT) can be used for sin or cos .but how to get sin inverse (arcsin) in vhdl? is there a way to generate sin inverse

 

 

i want perform below calculation in vhdl, 

 

library ieee; 

library ieee_proposed; 

USE ieee.std_logic_1164.all; 

use ieee.math_real.all; 

use ieee_proposed.float_pkg.ALL;  

 

architecture, 

 

PROCESS(clk) 

variable ph ,r ,l ,rp : float (4downto-27); 

BEGIN 

IF rising_edge(clk)THEN 

ph := arcsin((r / l)* sin(rp); 

ENDIF; 

END PROCESS;
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Altera_Forum
Honored Contributor II
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Why not just use a look up table like the rest?

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Altera_Forum
Honored Contributor II
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Default Re: how to calculate sin inverse (ARCSIN) in VHDL? 

Why not just use a look up table like the rest? 

 

So there is no other way to calculate arcsin ? using CORDIC IP CORE?
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

Why not just use a look up table like the rest? 

--- Quote End ---  

 

 

can you link a better lookup table here? I found one from this altera forum, it is 12 bits, 0-4095 sampled sine wave and cose wave.
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Altera_Forum
Honored Contributor II
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You can create your own LUT, with values filled using your own values, to as many bits as you want. 

In VHDL - create a constant that contains all of the values - look into Altera's VHDL coding guidlines on how to infer rom, and populate it with your own values.
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Altera_Forum
Honored Contributor II
1,796 Views

 

--- Quote Start ---  

You can create your own LUT, with values filled using your own values, to as many bits as you want. 

In VHDL - create a constant that contains all of the values - look into Altera's VHDL coding guidlines on how to infer rom, and populate it with your own values. 

--- Quote End ---  

 

 

Is there any easy way to create my own LUT?like using matlab?
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Altera_Forum
Honored Contributor II
1,796 Views

You can calculate the table initialization in VHDL, using ieee.math_real.arcsin.

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Altera_Forum
Honored Contributor II
1,796 Views

 

--- Quote Start ---  

You can calculate the table initialization in VHDL, using ieee.math_real.arcsin. 

--- Quote End ---  

 

 

I made a lookup table using excel and i put values in to switch case. and i get overlaps when accessing sin inverse. because when getting inverse of sine we point to a place at sin wave and get the phase of it. since sin wave is increasing and decreasing uniquely i get same amplitude levels twice when it increasing and decreasing. how to solve this. ?
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Altera_Forum
Honored Contributor II
1,796 Views

I would recommend to use a integer based Version of the cordic.

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Altera_Forum
Honored Contributor II
1,796 Views

 

--- Quote Start ---  

i get overlaps when accessing sin inverse 

--- Quote End ---  

 

Can only happen if you selected an unsuitable range for the table. Obviously you shouldn't exceed the +/- 90 degree principle value range, see https://en.wikipedia.org/wiki/inverse_trigonometric_functions#arcsin
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Altera_Forum
Honored Contributor II
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andraka's cordic paper (http://www.andraka.com/files/crdcsrvy.pdf) discusses how to do this. You basically create a cordic (http://zipcpu.com/dsp/2017/08/30/cordic.html), input a vector of your input value, and rotate it until the input value reaches (1,0). 

 

Personally, I find the arctan form (http://zipcpu.com/dsp/2017/09/01/topolar.html) of the cordic (http://zipcpu.com/dsp/2017/08/30/cordic.html) more useful, as it doesn't struggle with scale issues and the output doesn't struggle with angular ambiguities. 

 

Dan
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