modelsim testbench problem

[Altera_Forum]

Hi, 

I'm trying to simulate a system. Please find the attachement for the code.   Running the RTL simulation, I can't see in Modelsim the "i2c_slave_device" component. Where am I wrong? PS: I wrote the "i2c_slave_device" only for simulation purpose and it is not part of the "Channel_MNG" project.  Thanks for your help.

[Altera_Forum]

Hi, 

 what do you mean by see in Modelsim? You need to be more specific.  Gruß Tobi

[Altera_Forum]

--- Quote Start ---  Hi,  what do you mean by see in Modelsim? You need to be more specific.  Gruß Tobi  --- Quote End ---    I mean that in the modelsim "sim" window, there is only the "UUT" component (Channel_MNG) but not the "uut1" (i2c_slave_device) component. It seems like I did the connection wrong in the testbench file.

[Altera_Forum]

how do you compile themfiles? If you don't specify a path, Modelsim does not know it needs to compile that file, and so it doen't exist.

[Altera_Forum]

--- Quote Start ---  how do you compile themfiles? If you don't specify a path, Modelsim does not know it needs to compile that file, and so it doen't exist.  --- Quote End ---    If I compile the file from Modelsim everything is fine. While I try to launch the simulation from Quartus the component does not apper in Modelsim.

[Altera_Forum]

You see it compiling in the transcript?