Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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post-configuration BSDL files for Flex 10K Family

DAC
Beginner
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I need assistance generating post-configuration BSDL files for the legacy Intel/Altera Flex 10K family of FPGAs.  I found a “BSDL_FAQs” document on Intel’s website that has a description below of their “BSDLCustomizer” tool used for generating post-configuration BSDL files.  The Flex 10K family is not listed as a device type supported by this tool.

DAC_0-1606259142321.jpeg

I have compiled the firmware in Quartus 9.0 which supports the FLEX10K device family and has a post-configuration BSDL writer capability.  When I try to run the BSDL writer on the project, I get this message:

DAC_1-1606259142328.jpeg

The warning message is "Device family does not support board-level Boundary-Scan Description Language file generation".  As a result, no post-configuration BSDL file is generated.

Does Intel have a tool that can be used to generate post-configuration files for the FLEX 10K and 10KA FPGAs?   I have the pre-configuration BSDL files.  How can I generate post-configuration files for these devices?

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YuanLi_S_Intel
Employee
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Hi Sir,


Apologize that we do not have tool to generate that can be used to generate post-configuration files.


Since "BSDLCustomizer” tool is not supporting FLEX 10K and 10KA FPGAs, thus we cant generate post-configuration BSDL file.


Thank You


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