project compiles, but simulation fails

[CCC1]

This is a pretty basic block diagram for a class using 2 D FF's. The project compiles fine, but when I try to compile and run the functional simulation I get this error:

# ** Error: (vlog-13069) Waveform.vwf.vt(36): near "output": syntax error, unexpected output, expecting IDENTIFIER or TYPE_IDENTIFIER or NETTYPE_IDENTIFIER.

# ** Error: (vlog-13069) Waveform.vwf.vt(44): near "output": syntax error, unexpected output, expecting ')'.

# End time: 01:48:11 on May 01,2021, Elapsed time: 0:00:00

# Errors: 2, Warnings: 0

# ** Error: c:/intelfpga_lite/19.1/modelsim_ase/win32aloem/vlog failed.

# Executing ONERROR command at macro ./labsix.do line 4

Error.

[sstrell]

I don't know if this is the issue, but your schematic shows you are using active low resets (CLRN) but your testbench waveform only releases the reset for one cycle, unless there's more of the testbench not shown in your capture.

[Nurina]

Hi, 

Did the above reply helped?

[Nurina]

Hi,

We did not receive any response to the previous reply provided, thus I will put this case to close pending. Please post a response in the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions.

Regards,
Nurina

PS: If you find any comment from the community or Intel Support to be helpful, feel free to give Kudos.