quartus 9.0 bus input / output / bidir

[Altera_Forum]

I have an I/O-bus with about 40 pins. within this bus there are some pins i want to configure input some should be output and some bidir, but it's just possible to make them all bidir or else quartus isn't compiling it succesfully. 

is there a way to change that?

[Altera_Forum]

I assume your bus is at the design top level and is mapping to device pins.  

 How is your top level bus defined in the code (VHDL or Verilog)? Can you include a code fragment?  Are you having problems mapping a port to physical pins?  Without more info I would suggest that you break up your bus into an input bus, an output bus and a bidirectional bus.

[Altera_Forum]

It's possible to define the bus completely as inout, and to set individual pins as output by assigning a signal to them. This allows for different target configurations without changing the port definition.

[Altera_Forum]

You can try "buffer"!