Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
Announcements
FPGA community forums and blogs have moved to the Altera Community. Existing Intel Community members can sign in with their current credentials.
17267 Discussions

"in system memory content" editor and clock domains, really safe ?

Altera_Forum
Honored Contributor II
‎06-30-2011 10:27 PM
1,167 Views

Hi, are "in system memory content" constant really safe (I mean correctly designed) ? 

 

I don't need to put registers after them, do I ? 

A design rule checker says that all my "in system memory content" constants are not synchrnonized betwen clock domains. 

 

Regards 

 

Quartus 9.1 sp1 WEB edition. Win XP SP2 

 

EDIT :  

I see inclock and outclock on ports of those ISMCE in rtl viewer. So I think that different clocks are handled inside.
0 Kudos

Link Copied

0 Replies
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.