Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
17267 Discussions

reset vector error coming

Altera_Forum
Honored Contributor II
2,107 Views

hi 

 

i selected epcq controller ,nios 2 classic processor and onchip memory. 

in quartux program compiled ,when i created BSP than reset vector address error coming .i attached all screenshots . 

 

please provide me solution for this error.
0 Kudos
3 Replies
Altera_Forum
Honored Contributor II
1,177 Views

The pictures are too small. Please post text or re-attach the pictures so they can be viewed.

0 Kudos
Altera_Forum
Honored Contributor II
1,177 Views

hi 

 

I attached pdf in that i pictures are clearly showing and i written test also. 

 

Thanks & Regards 

DEEPAK
0 Kudos
Altera_Forum
Honored Contributor II
1,177 Views

It looks like you edited the linker script, adding a new memory mapped area. Please show the Linker Script tab of the BSP Editor.

0 Kudos
Reply