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running design example on altera

Altera_Forum
Honored Contributor II
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hi everyone, 

am using altera cyclone III dev, this is very new to me. 

if anyone know how to run design examples on altera pls help me. 

if there are any tutorials regarding this pls suggest me. 

 

thank you.
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Altera_Forum
Honored Contributor II
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Hi, you get altera cyclone III dev, there is an included "getting started" which is a good point to start. 

On altera web site > Literature, there are numerous pdf tutorials.
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Altera_Forum
Honored Contributor II
387 Views

hi sir/madam, 

thank you so much for your reply. 

 

am trying to run web server design example, there as soon as i launch sopc builder its not asking for create new system instead its showing open system and am encountering errors related to sd_ram_controller. if i disable that then there will not be any errors, it generates files. but while running those files am getting many errors. 

 

my question is 

can i disable components which are already defined? 

 

and files generated are are in Verilog HDL files i want VHDL files  

how to get VHDL files? 

 

any suggestions are appreciated 

 

thank you. . .
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Altera_Forum
Honored Contributor II
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Which version of Quartus & Nios are you using ? 

Could you post errors ?
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Altera_Forum
Honored Contributor II
387 Views

am using quartus II 8.1 and nios II system. 

am getting these errors as soon as i launch sopc builder 

Error: el_camino_sd_card_controller: Info: ******************************************************************* 

Error: el_camino_sd_card_controller: Info: Running Quartus II Analysis & Synthesis 

Error: el_camino_sd_card_controller: Info: Version 8.1 Build 163 10/28/2008 SJ Web Edition 

Error: el_camino_sd_card_controller: Info: Copyright (C) 1991-2008 Altera Corporation. All rights reserved. 

Error: el_camino_sd_card_controller: Info: Your use of Altera Corporation's design tools, logic functions  

Error: el_camino_sd_card_controller: Info: and other software and tools, and its AMPP partner logic  

Error: el_camino_sd_card_controller: Info: functions, and any output files from any of the foregoing  

Error: el_camino_sd_card_controller: Info: (including device programming or simulation files), and any  

Error: el_camino_sd_card_controller: Info: associated documentation or information are expressly subject  

Error: el_camino_sd_card_controller: Info: to the terms and conditions of the Altera Program License  

Error: el_camino_sd_card_controller: Info: Subscription Agreement, Altera MegaCore Function License  

Error: el_camino_sd_card_controller: Info: Agreement, or other applicable license agreement, including,  

Error: el_camino_sd_card_controller: Info: without limitation, that your use is for the sole purpose of  

Error: el_camino_sd_card_controller: Info: programming logic devices manufactured by Altera and sold by  

Error: el_camino_sd_card_controller: Info: Altera or its authorized distributors. Please refer to the  

Error: el_camino_sd_card_controller: Info: applicable agreement for further details. 

Error: el_camino_sd_card_controller: Info: Processing started: Thu Mar 17 10:02:19 2011 

Error: el_camino_sd_card_controller: Info: Command: quartus_map not_a_project --generate_hdl_interface=C:\altera\suma\web_ser\webserver_c3\web_server\altera_avalon_sd_mmc_spi\ip_sd_mmc_spi_wrapper.vhd --source=C:\altera\suma\web_ser\webserver_c3\web_server\altera_avalon_sd_mmc_spi\ip_sd_mmc_spi_wrapper.vhd --source=C:\altera\suma\web_ser\webserver_c3\web_server\altera_avalon_sd_mmc_spi\ip_sd_mmc_spi.vhd --set=HDL_INTERFACE_OUTPUT_PATH=C:\DOCUME~1\user\LOCALS~1\Temp\sopcqmap35285tmp\ip_sd_mmc_spi_wrapper.vhd_temp 

Error: el_camino_sd_card_controller: Error: Can't find valid feature line for core SD_MMC_SPI_CORE (EC11_0002) in current license 

Error: el_camino_sd_card_controller: Error (10003): Can't open encrypted VHDL or Verilog HDL file "C:/altera/suma/web_ser/webserver_c3/web_server/altera_avalon_sd_mmc_spi/ip_sd_mmc_spi.vhd" -- current license file does not contain a valid license for encrypted file 

Error: el_camino_sd_card_controller: Error: Quartus II Analysis & Synthesis was unsuccessful. 2 errors, 0 warnings 

Error: el_camino_sd_card_controller: Error: Peak virtual memory: 173 megabytes 

Error: el_camino_sd_card_controller: Error: Processing ended: Thu Mar 17 10:02:22 2011 

Error: el_camino_sd_card_controller: Error: Elapsed time: 00:00:03 

Error: el_camino_sd_card_controller: Error: Total CPU time (on all processors): 00:00:02 

Error: el_camino_sd_card_controller: Analyser output file not present: ip_sd_mmc_spi_wrapper.vhd.xml 

Error: el_camino_sd_card_controller: No definition of ip_sd_mmc_spi_wrapper in C:/altera/suma/web_ser/webserver_c3/web_server/altera_avalon_sd_mmc_spi/ip_sd_mmc_spi_wrapper.vhd 

 

if i disable el_camino_sd_card_controller then it generates system without any error. 

after that while executing top module i am facing these errors 

 

Error: Port "CSn_from_the_el_camino_sd_card_controller" does not exist in macrofunction "cycloneIII_embedded_evaluation_kit_web_server_sopc_instance" 

Error: Port "DI_from_the_el_camino_sd_card_controller" does not exist in macrofunction "cycloneIII_embedded_evaluation_kit_web_server_sopc_instance" 

Error: Port "DO_to_the_el_camino_sd_card_controller" does not exist in macrofunction "cycloneIII_embedded_evaluation_kit_web_server_sopc_instance" 

Error: Port "SCLK_from_the_el_camino_sd_card_controller" does not exist in macrofunction "cycloneIII_embedded_evaluation_kit_web_server_sopc_instance" 

Error: Port "WP_to_the_el_camino_sd_card_controller" does not exist in macrofunction "cycloneIII_embedded_evaluation_kit_web_server_sopc_instance" 

Info: Generated suppressed messages file C:/altera/suma/des_ex/webserver_c3/web_server/cycloneIII_embedded_evaluation_kit_web_server.map.smsg 

Error: Quartus II Analysis & Synthesis was unsuccessful. 6 errors, 88 warnings 

Error: Peak virtual memory: 352 megabytes 

Error: Processing ended: Thu Mar 17 09:47:54 2011 

Error: Elapsed time: 00:02:22 

Error: Total CPU time (on all processors): 00:01:07 

 

pls help me out of this.
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Altera_Forum
Honored Contributor II
387 Views

Hi, I see this is NOT a sd_ram_controller problem (as post# 3), but it is a license problem for el_camino_sd_card_controller. 

 

--- Quote Start ---  

Error: el_camino_sd_card_controller: Error: can't find valid feature line for core sd_mmc_spi_core (ec11_0002) in current license 

Error: el_camino_sd_card_controller: Error (10003): Can't open encrypted VHDL or Verilog HDL file "C:/altera/suma/web_ser/webserver_c3/web_server/altera_avalon_sd_mmc_spi/ip_sd_mmc_spi.vhd" -- current license file does not contain a valid license for encrypted file 

 

--- Quote End ---  

 

Check your license files. 

El camino sd_card controller is a third party component. Maybe license expired.
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Altera_Forum
Honored Contributor II
387 Views

thank you so much for your reply. . . 

that problem got resolved. . . 

 

i successfully downloaded that into fpga and i have selected correct .sof file even then when i tried to download it into nios ii it is showing this messege in the consol. . . 

 

Using cable "USB-Blaster [USB-2]", device 1, instance 0x00 

Pausing target processor: OK 

Reading System ID at address 0x08000200:  

ID value does not match: read 0x62C962CE; expected 0x54F17201 

Timestamp value does not match: image on board is older than expected 

Read timestamp 0:47:22 2010/12/22; expected 9:34:51 2011/03/17 

The software you are downloading may not run on the system which is currently 

configured into the device. Please download the correct SOF or recompile. 

Restarting target processor 

 

am not getting where i might have gone wrong. .  

pls help me. . .
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Altera_Forum
Honored Contributor II
387 Views

I means that you aren't using the same version of the sopc system definition for your software and hardware parts. Try to re-generate the SOPC system, recompile the Quartus project and recompile your software, in that order.

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Altera_Forum
Honored Contributor II
387 Views

i tried it. but it didn't work. it is showing the same messege in the console.

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Altera_Forum
Honored Contributor II
387 Views

hi, 

in nios ii v8.1 "nios ii c/c++ application and BSP templet" was not there so i uninstalled that and installed version 10.1, in that target connections are not accessable and in nios ii hardware consol it is showing the following messege, 

 

could not initialize class.com.altera.systemconsole.internal.plugin.jtag.aji.AJIcable 

 

what may be the problem? 

 

pls help me. . .
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Altera_Forum
Honored Contributor II
387 Views

hi, 

sorry it was not a problem. i didn't knew that "nios ii c/c++ application and bsp" templet is used only for compilation, i tried to run it on hardware so that problem had occured. . . 

 

now am facing a different problem. . . 

 

i downloaded web server hardware into fpga and tried to run hello word software program on nios ii. there are no errors nothing but the problem is, output is not getting displayed in the console. 

 

if anybody has idea where i might have gone wrong or what the problem may be, pls help me. . . 

 

thank you. . .
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