Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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trying to use axi4stream VIP with VCS. it fails due to not finding axi4stream_initialise_SystemVerilog function

WDitt1
Beginner
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NEED axi4stream_initialise_SystemVerilog definition....

see below

 

there is a "weak" axi4stream_initialise_SystemVerilog in vcs_hdrs.h

 

not same as function called in Error-[DPI-DIFNF] DPI import function not found mgc_common_axi4stream.sv, which I can't find defined anywhere,

 

Declaration (need Definition to match)

import "DPI-C" context function longint axi4stream_initialise_SystemVerilog

  (

    int  usage_code,

    string iface_version,

    output longint master_end,

    output longint slave_end,

    output longint clock_source_end,

    output longint reset_source_end,

    output longint _monitor_end,

    input int AXI4_ID_WIDTH,

    input int AXI4_USER_WIDTH,

    input int AXI4_DEST_WIDTH,

    input int AXI4_DATA_WIDTH

  );

 

 

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MuhammadAr_U_Intel
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Hi, Please refer to AXI VIP User guide in reference below and run the examples provided with the Quartus installation to get familiar with it, https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/mentor_vip_axi4_stream_ae_usr.pdf Page 189 Chapter 12 Getting Started with Qsys and the BFMs Thanks, Arslan
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BDITT
Beginner
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I had used the aforementioned user guide.

I am trying to modify the VIP for use with our own design.

Evidently its not supported.

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