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Hello Community,
I got a problem with my current coding task: I want to create a small microprocessor in VHDL to work with assembly language via my mif-file. One of my tasks should be a wait statement. The problem: it should be variable in time. I want to be able to wait as long as the number in my loaded memory is. This code I tried to implement but it didn't compile:when execute_wait =>
wait for memory_data_register ns;
state <= fetch;
In this example my memory_data_register is the content which is read from my memory. It's type is unsigned. I'd be perfect, if somebody can help me ;) Best, orPoG
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Wait statements are only for simulation and indeed not synthesizable. You'll have to write a timer for this purpose.
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Hello PietervanderStar,
thanks for your hint! I've now solved the problem this way:-- wait state
process
begin
wait until clk_50MHZ'event and clk_50MHZ = '1';
if count_1KHZ /= 24999 then
count_1KHZ <= count_1KHZ + 1;
else
count_1KHZ <= 0;
clk_1KHZ <= not clk_1KHZ;
end if;
end process;
process (clk_1KHZ)
begin
if (clk_choice = '0') then
if rising_edge(clk_1KHZ) then
if (count_individual_timer < timer_time) then
count_individual_timer <= count_individual_timer + 1;
individual_timer_EN <= '0';
else
individual_timer_EN <= '1';
count_individual_timer <= 0;
end if;
end if;
else
individual_timer_EN <= '1';
end if;
end process;
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