Building Yocto for FPGA boot first config on Agilex 7

[Mikhail_a]

Hello.

I work with Intel Agilex ® 7 FPGA I-Series Transceiver-SoC Development Kit and AGIB027R31B1E2VR0 device. I need to build rootfs image. I've tried a guide I'd found on rocketboards (https://www.rocketboards.org/foswiki/Documentation/AgilexSoCGSRDSIAGI027) and with this guide i was able to build an sd card image with my own fpga bitstream file. But this guide is for HPS boot first config and now I need to create SD image for FPGA boot first config.

I was able to create .jic file, write it to QSPI flash and get FPGA configured from it after power up. Now it is a bit unclear for me how to modify Yocto building flow to disable FPGA configuration from U-Boot SSBL. Do you have any information about this?

[Jeet14]

Hi,

I am not able to open the shared link, it is broken. please resend once again.

Regards

Tiwari

[Mikhail_a]

Hello.

Of course.

https://www.rocketboards.org/foswiki/Documentation/AgilexSoCGSRDSIAGI027

[Jeet14]

Hi,

From uboot you can configure the fpga using the below command-

https://www.intel.com/content/www/us/en/docs/programmable/683389/21-4/configuring-the-fpga-fabric-from-u-boot.html

Unfortunately we don't have such command to disable or reset the fpga configuration from the uboot.

Regards

Jeetesh

[Mikhail_a]

Hello Jeetesh

Thank you for the link you've sent. But the problem is that I need to disable booting FPGA on SSBL stage and I couldn't find where is it can be disabled in U-Boot while compiling sd card image with Yocto. 

I could only find something that controls booting process in file:

gsrd_socfpga/meta-intel-fpga-refdes/recipes-kernel/linux/linux-socfpga-lts/fit_kernel_agilex_fm87.its

		fpga-4 {
			description = "FPGA bitstream for GHRD";
			data = /incbin/("./ghrd.core.rbf");
			type = "fpga";
			arch = "arm64";
			compression = "none";
			load = <0xA000000>;
			hash {
				algo = "crc32";
			};

And during booting it can bee seen in a log

## Loading fpga from FIT Image at 02000000 ...
   Trying 'fpga-4' fpga subimage
     Description:  FPGA bitstream for GHRD
     Type:         FPGA Image
     Compression:  uncompressed
     Data Start:   0x0283c534
     Data Size:    3350528 Bytes = 3.2 MiB
     Load Address: 0x0a000000
     Hash algo:    crc32
     Hash value:   a4fe125a
   Verifying Hash Integrity ... crc32+ OK
   Loading fpga from 0x0283c534 to 0x0a000000
....Error sending bitstream!
....Error sending bitstream!
FPGA image is corrupted or invalid
SCRIPT FAILED: continuing...
** Unable to read file / **
Failed to load '/'

[Jeet14]

Hi,

Are you looking for when board boots up from the SD card, it only runs the uboot and kernel and it should not load bitfile while booting?

Regards

Tiwari

[Mikhail_a]

Hello!

Yes this is exactly what i'm looking for as at the moment of booting from SD card I already have the FPGA configured.

[Jeet14]

Hi,

Please follow the below link on Build SD Card Image-

https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderAgilex7#Boot_from_SD_Card_Example

In this above link it guide us on sd card image creation with multiple files like- u-boot.itb, Image, socfpga_agilex_socdk.dtb, ghrd.core.rbf.

In you case while creating SD card image don't include the .rbf file. and when you board booted up at u-boot run the fpga load command to configure the bitfile.

Regards

Tiwari

[Mikhail_a]

Hello Tiwari

Thank you for this link. I'm going to try it and see if it works for me.

[Jeet14]

Hi,

I believe your enquiry has been answered. With that, I now transition this thread to community support. 

Thank you.

Best Regards,

Tiwari

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.

[Mikhail_a]

Yeap I managed to build Yocto with FPGA boot first config.

Thank you.