Config/Boot flow without U-boot for Agilex devices

[anrfpga]

Hi,

I am trying to run a bare metal application on Agilex devkit and trying to figure out how to run my application without u-boot. As far as I understand, in the HPS first boot flow that I am interested in, the FPGA is configured via the SSBL/U-boot. Is there any way I can skip u-boot, make the u-boot spl/preloader to configure both HPS EMIF and program the FPGA and then run my application?

or is there any method to configure the FPGA after loading the preloader like in Xilinx SDK/Vitis?

[EBERLAZARE_I_Intel]

Hi,

Is this what you are looking for?:

https://rocketboards.org/foswiki/Projects/AgilexSoCHPSFirstSingleQSPIFlashBoot

[anrfpga]

Hi Eberlazare,

Thanks for the reply. No, that is not what I am looking for. That still involves u-boot & Linux. I am looking for something similar to https://github.com/cambridgehackers/Altera-SoCFPGA-HardwareLib-MPL , where the SPL/FSBL itself programs the FPGA and I can run my applications from ARM-DS directly without involving OS or U-boot. Please let me know how to modify U-boot SPL to program the FPGA by avoiding the U-boot and OS.

Also, Is it really possible to run bare metal apps on Agilex? Did Intel engineers test any alternative boot flows? I have already spent close to 2 weeks on this thing and every solution I tried reached a dead-end. Please suggest a solution,

Regards

Nikhil

[EBERLAZARE_I_Intel]

Hi,

I need some time to get the info regarding your latest request. I shall get back to you.

[EBERLAZARE_I_Intel]

Hi,

Unfortunately, we do not have baremetal examples for Agilex.

Would you have any alternatives inquiry?

You may refer some documentations here:

https://www.intel.com/content/www/us/en/docs/programmable/683634/21-2/using-the-bootloader-as-a-bare-metal.html

https://www.intel.com/content/www/us/en/docs/programmable/683187/20-1/bare-metal-compilers-22637.html

[anrfpga]

Hi Eberlazare,

Thanks for letting me know. I have already wasted close to 2 weeks trying to run a bare-metal app and moved to Linux boot flow after nothing worked.

Does Intel have any plans to enable Bare-metal flow on Agilex or create some examples for the same?

As for the "Using the bootloader as a bare-metal framework" page, can you point me to some reference on how to do it? 

[EBERLAZARE_I_Intel · Accepted solution]

Hi,

Unfortunately, we do not have the info on the future examples for Agilex Baremetal.

Well, alternatively, you could do, get the examples from Stratix 10 SoC baremetal and go from there since both are based on ARM* Cortex-A53 processors.

To get the examples for Stratix 10 SoC Baremetal, you need to install SoC EDS 20.1 Pro, the examples are located in "installation_folder/examples/software/...". :

Reference link for future guidance:

https://www.intel.com/content/www/us/en/collections/products/fpga/software/downloads.html?s=Relevancy&q=soc%20eds

https://rocketboards.org/foswiki/Documentation/SoCEDS

https://www.intel.com/content/www/us/en/docs/programmable/683638/20-1/professionalprofessional-intel-soc-fpga.html

https://github.com/altera-opensource/intel-socfpga-hwlib

https://rocketboards.org/foswiki/Documentation/HWLib

[EBERLAZARE_I_Intel]

Hi,

Any further questions from your side?