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Hi, I want to write/read to the FPGA DDRs from FPGA of Arria 10 soc fpga. I know that this has to be done through a verilog file. Do I have to use DMA . Can somebody help me how to get around this problem or any link to reference material.
Many thanks..
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Hi,
Here are some you can refer to:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-20115.pdf
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/arria-10/a10_handbook.pdf#page=190
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-a10-soc-devkit.pdf
Regards.
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Thank you very much. I appreciate your reply. .
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