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Hello,
I am trying to implement some features using Bridge interface.(Lightweight HPS-to-FPGA)
The "bridge enable" command in u-boot didn't work properly.
So, I modified the device tree and I can see that the command was operating properly.
And then I wrote application to control led_pio to verify whether bridge is working properly. But, it's not working properly.
Can you give me a guide about using this bridge(LightWeight HPS to FPGA) feature?
(Chip/SoC: Arria10, linux kernel version: 6.1.68)
I attached device tree and application that I modified or wrote.
(dt_bridge_feature_added.txt, user_space_application.c)
Regards,
Jung
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Hi,
Please refer the below link for setting up the GHRD & GSRD for A10 SoC development kit. This link is having example for the gpio/pio and the Lightweight HPS-to-FPGA.
https://www.rocketboards.org/foswiki/Documentation/Arria10SoCGSRD
Also, refer the below link for the linux user space application to blink the LEDs.
https://github.com/altera-opensource/linux-refdesigns/blob/master/blink/blink.c
Let me know if have any questions on this?
Regards
Tiwari
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Thank you for comment.
I would like to use lightweight HPS-FPGA features in HPS.
I have already checked the document (url) you mentioned. But I can't find an example.
I'm having trouble finding examples, so can you tell me where I can find examples related to usage of LightWeight-HPS-to-FPGA?
As I understand, the lightweight HPS-FPGA bridge is connected to led_pio.
So, I tried to turn on/off led_pio by controlling the LightWeight-HPS-to-FPGA bridge in HPS.
So I don't need the blink.c example.
I would appreciate it if you could tell me where I can find examples related to LightWeight-HPS-to-FPGA.
Regards,
Jung
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I understand that you commented.
The blink.c example accesses peripheral address(0xff200010) using gpio driver(via sysfs interface).
I had misunderstood this as a gpio function and not a bridge function.
But, It seems that below content in your document(url, GSRD) is wrong.
The led_pio address of the attached device tree(socfpga_arria10_ghrd.dtsi) in your document is 0x100000010.
But, If you try following this document, the address is 0xff200010.
HOWTOCreateADevicetreeForArria10SoC
Which one is correct?
Regards,
Jung.
@Jeet14 wrote:Hi,
Please refer the below link for setting up the GHRD & GSRD for A10 SoC development kit. This link is having example for the gpio/pio and the Lightweight HPS-to-FPGA.
https://www.rocketboards.org/foswiki/Documentation/Arria10SoCGSRD
Also, refer the below link for the linux user space application to blink the LEDs.
https://github.com/altera-opensource/linux-refdesigns/blob/master/blink/blink.c
Let me know if have any questions on this?
Regards
Tiwari
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Hi,
GPIO number you can get it with the boot log and the device tree gpio@<address>.
E.g. In the boot log you will see the below-
gpiochip_find_base: found new base at 480
gpio gpiochip0: (/soc/gpio@0xf9000270): added GPIO chardev (254:0)
gpio gpiochip0: registered GPIOs 480 to 511 on /soc/gpio@0xf9000270
In the device tree you will see the gpio@<address>
*.dts file is having the node--> gpio@0xf9000270 with 32 bit.
Regards
Tiwari
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Hi,
Let me know if you have any other query on this?
If no, then I will close this case by EOD but it will be open for forum community/users to reply.
Regards
Tiwari
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Hello,
Thank you for your comments.
I also want to know how to program FPGA.
Is there a way to update rbf files in Arria10 SoC system based on GSRD?
(ghrd_10as066n2.periph.rbf , ghrd_10as066n2.core.rbf)
If there is a related guide document, please send it to me.
(I'm using QSPI boot mode and Arria10 SoC Development Kit now.)
Thanks.
Regards,
Jung.
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Hi Sunyeong,
I hope your first issue has been answered.
For second query/issue, please open new forum case as it is recommended not to mix the different queries on same issue/query. Other Expert will help you on new case.
Regards
Tiwari
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Hello,
Okay, I'll open a new forum case.
Thank you for your comments.
Regards,
Jung.

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