I have some question soc fpga (Arria 10) clock
I Use to The 10AS027E2F27I2SG (Arria 10 soc FPGA)
Can the clocks on the HPS and FPGA be used as different clocks on this product?
ex) HPS use : 25 MHz / FPGA use : 50 MHz
Could you share the datasheet related to diffrentical clock use?
have a good daY~
For this you could use the PLL soft ip to manage the clock between your HPS and other IPs.
You could refer to the link below:
Since there are no feedback for this thread, I shall set this thread to close pending. If you still need further assistance, you are welcome reopen this thread within 20days or open a new thread, someone will be right with you.
If you happened to close this thread you might receive a survey. If you think you would rank your support experience less than 10 out of 10, please allow me to correct it before closing or if the problem can’t be corrected, please let me know the cause so that I may improve your future service experience.