Problem in using HPS Loan IO Pins for Triple Speed Ethernet IP Core RGMII Interface

[BSHAN]

 have tried to used the hps loanio pins for the triple speed ethernet RGMII interface output and input. I am getting the following error in the Quartus compilation

Error (15874): Output port DATAOUT of DDIO_OUT primitive “Cyclone_V_Controller:inst3|Cyclone_V_Controller_eth_tse_3:eth_tse_3|altera_eth_tse_mac:i_tse_mac|altera_tse_rgmii_module:U_RGMII|altera_tse_rgmii_out4:the_rgmii_out4|altddio_out:altddio_out_component|ddio_out_jhb:auto_generated|ddio_outa[0]” must drive input port I of I/O OBUF primitive or input port DATAIN of DELAY_CHAIN primitive.

Error (15871): Input port DATAIN of DDIO_IN primitive “Cyclone_V_Controller:inst3|Cyclone_V_Controller_eth_tse_3:eth_tse_3|altera_eth_tse_mac:i_tse_mac|altera_tse_rgmii_module:U_RGMII|altera_tse_rgmii_in1:the_rgmii_in1|altddio_in:altddio_in_component|ddio_in_gsd:auto_generated|ddio_ina[0]” must come from an I/O IBUF or DELAY_CHAIN primitive

Cant I use the HPS loan IO pins for triple speed ethernet or I need to do some settings?

[AnilErinch_A_Intel]

Hi , 

It seems like there is an issue how you are instantiating and driving the ethernet pins. 

Please refer to a similar case related to DDR. 

https://community.intel.com/t5/Intel-Quartus-Prime-Software/ALTDDIO-OUT-error-15874/m-p/259568

Also please check the below link. 

https://community.intel.com/t5/FPGA-Intellectual-Property/Testing-RX-SERDES-with-a-known-value/td-p/154357

If you have a general doubt about HPS Loaner IO usage.

Please refer the video below.

https://www.youtube.com/watch?v=cRwzmsJ1Jkg

Thanks and Regards

Anil