Intel® SoC FPGA Embedded Development Suite
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567 Discussões

RiscFree Cyclone V Example Project Building Failed

neveruse_altera_again
2.683 Visualizações

Hi,

 

Just installed the newest version RiscFree IDE to learn Cyclone V HPS software. Imported the example project, but found out the project cannot build correctly. The console showed 

Nothing to build for project cyclonev-a9-sum

, and error with 

make: *** No rule to make target 'clean'. Stop.

 

 

I also found in property a warning sign

Orphaned configuration. No base extension cfg exists for ilg.gnuarmeclipse.managedbuild.cross.config.elf.debug.1943684229

and

Orphaned toolchain ilg.gnuarmeclipse.managedbuild.cross.toolchain.elf.debug.1181778623 (Arm Cross GCC)

in the Tool Chain Editor page.

 

I am new to these settings in Eclipse and also the RiscFree IDE, could anyone to show how to configure the toolchain?

 

Thank you!

Zihan

0 Kudos
1 Solução
neveruse_altera_again
2.440 Visualizações

Found the cause of this issue, which is that the RiscFree for Intel does not come with ARM cross compiler and related toolchain. After weeks' trial with ARM DS, RiscFree and GNU MCU Eclipse, I feel that ARM DS works fine but with expensive license, RiscFree with ARM toolchain as well as GNU MCU Eclipse can compile and connect to usb blaster wherase I still cannot go through the gdb process. I will turn to Zynq.

Ver solução na publicação original

5 Respostas
aikeu
Funcionário
2.624 Visualizações

Hi zihangao,


My attempts for HPS compilation was using linux environment to get the specific compilers.

I think the links below may help:

https://www.rocketboards.org/foswiki/Documentation/SoCEDS

https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderCycloneVAndArria10


Thanks.

Regards,

Aik EU


aikeu
Funcionário
2.594 Visualizações

Hi zihangao,


I will close the thread if no further question.


Thanks.

Regards,

Aik Eu


neveruse_altera_again
2.564 Visualizações

Hello Aik,

 

Thank you for your reply. I have no issue with ARM DS on compiling and debugging, but concerning the licensing I would try the RiscFree if it supports Cyclone V HPS. I guess for now I have to use ARM DS for evaluation.

 

Thanks,

Zihan Gao

aikeu
Funcionário
2.528 Visualizações

Hi zihangao,


Ok, thanks for the feedback I will close the thread for now.


Thanks.

Regards,

Aik Eu


neveruse_altera_again
2.441 Visualizações

Found the cause of this issue, which is that the RiscFree for Intel does not come with ARM cross compiler and related toolchain. After weeks' trial with ARM DS, RiscFree and GNU MCU Eclipse, I feel that ARM DS works fine but with expensive license, RiscFree with ARM toolchain as well as GNU MCU Eclipse can compile and connect to usb blaster wherase I still cannot go through the gdb process. I will turn to Zynq.

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