Intel® SoC FPGA Embedded Development Suite
Support for SoC FPGA Software Development, SoC FPGA HPS Architecture, HPS SoC Boot and Configuration, Operating Systems
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
573 Discussions

Unable to Compile FPGA-to-HPS Bridge Design Example for CV SoC DevKit Rev E baremetal project in Eclipse on Windows 10 Machine.

MHada
Beginner
1,548 Views

Hi,

 

I downloaded the following project for Cyclone V SOC Development Kit:-

 

FPGA-to-HPS Bridge Design Example for CV SoC DevKit Rev E

and programmed the FPGA using .sof file on my kit which is done successfully.

 

However, when I try to compile the software project in eclipse on my Windows 10 machine, it gives the following error attached in the image file.

 

Why is such error here? How do I remove this error?

 

Error.PNG

 

 

 

 

 

0 Kudos
3 Replies
MHada
Beginner
1,252 Views

I am unable to find cycloneV_hps_arm_a9_0.h

 

Where can it be found? Please inform.

 

Also please let us know as to why this problem is coming?

0 Kudos
EBERLAZARE_I_Intel
1,252 Views

Hi,

 

Can you rebuild the project by following the steps below from page 26 to page 29:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_soc_eds.pdf#page=26

 

 

0 Kudos
EBERLAZARE_I_Intel
1,252 Views

Hi,

 

Have you try rebuilding the project following the steps above?

 

I did face the similar error when using a prebuilt project, thus I attempt to rebuild the project and it does removes the error.

0 Kudos
Reply