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Hi,
My goal is to successfully build and run a bare-metal app which measure time by reading one of the the Arria V Soc HPS timers using hwlib. Afterwards I wish to use the same app on a custom board which contains the same HPS as the Arria V SoC.
I'm using Windows with Arm DS-5 v5.29.1 and IntelFPGA suite 18.1 (these the packages I have license for)
I tried to follow several examples like here:
https://www.intel.com/content/www/us/en/docs/programmable/683211/current/bare-metal-user-guide.html
but got some conflicts when using different compilers.
I have two questions please:
1. I don't know which compiler is best for me. I got lost between the following three options:
1.1. In the Bare Metal user guide (link above) they suggest using the ARM Compiler 5 C.
1.2. In the HWlib section, they refer to git repository which recommend using the Linaro suite.
1.3. In the Altera-SoCFPGA-HardwareLib-Timer-AV-ARMCC example (intelFPGA 18.1 version) they use , by defualt , the GCC 4.x [arm-linux-gnueabihf](DS-5 built in) and if I switch to the ARM CC 5 as the Bare Metal user guide suggests I get "program -E" error.
So I got a little confused regarding which one to use and why.
2. The official Intel HWLib source is here:
https://github.com/altera-opensource/intel-socfpga-hwlib
they have a category for av/cv but inside all the examples are for cyclone V only (no av examples)
is there any guide regarding how to configure a new "hello" app to use the hwlib?
- do I need to compile the hwlib first?
- if do, does it generates libraries for inclusion in my "hello" app?
Thanks
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Hi,
Since the case have been open for too long, we recommend that we close the thread as per our support procedure.
However, I highly recommend that you open issues that you'd face separately, for e.g your help needed for Quartus compilation on another then the Baremetal build on next.
Once you open the new case/s, we will support your issue then. Hopes this helps.
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I can try but I apologize I don't know how to do that.
Which file to load and how to compile?
Thanks
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Hi,
If you're new, please check the following video for reference on the flow of Quartus build in part 1 and part 2:
https://www.youtube.com/watch?v=8BehnPg8IvM&ab_channel=IntelFPGA
https://www.youtube.com/watch?v=L8FMSy7Uxjc&ab_channel=IntelFPGA
The video is just for your reference, it is using old flow but they are almost similar.
For your step, in Quartus GUI, locate and open the GHRD's Project file ".qpf" in then compile to get the handoff folder to proceed.
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Hi,
Any latest update from your side?
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Hi,
Thank you very much for your replies and patience.
I apologies I didn't answered earlier.
Currently I don't have access to my EVB right now so I kinda stuck until 04/17
Is it ok to post my progress on this date?
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Hi,
Since the case have been open for too long, we recommend that we close the thread as per our support procedure.
However, I highly recommend that you open issues that you'd face separately, for e.g your help needed for Quartus compilation on another then the Baremetal build on next.
Once you open the new case/s, we will support your issue then. Hopes this helps.
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I'll do it, based on your previous replies.
Thank you very much
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Hi,
We look forward to support you on any new thread/issue from you, I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.

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