- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi all:
I'm a new worker on NIOS,I'm using a CycloneIII starter board and followed a sopc class.I have some basic questions about NIOS and SOPC. First:My board have a CFI flash and a SSRAM,according to reference design, the reset address is 0xe00000in in the flash and the exception address is 0x20 in the ssram.Why they reside in different memory and how can I decide the address?The software will be stored in flash memory,and what will I do with the ssram ? Second:What's the detailed process of a "hello worl" program run ?After power up,the FPGA will be configurated by the CFI flash, and then how the software run? Third:I'm using NIOS II IDE 8.1,in the flash programmer, I can't find any setting,how can I control the program procee? Thank you very much in advance for your kindly help. Best regards!Link Copied
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
The CPU will start executing the code at the reset address on power up. As the SSRAM contents aren't initialized at that time, it is better to make this point to the flash.
The exception address is configured by the software at run time, so needs to be put in a RAM.- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Thank you very much and nice to meet you again dear xiwen :)
If the base address of the flash is 0x01000000,the reset offset is 0x20, is this means at last the .elf ->.flash file will be wrote from 0x01000020 in the flash ?Is there any way I can see the detailed address and content of the flash memory after configurated ? And no matter what the base address and the offset is, the .sof ->.pof will be write from 0x20000 in the flash,is this right ?Are there any requirement or limitation between the base address and the address 0x20000 ?- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I've never useda CFI flash (I use serial configuration devices) but IIRC you are right. The FPGA image starts at address 0x20000 in the flash, and the CPU starts at offset 0x20.
It can be difficult to fit your application in such a short space, so you should either insert some code at address 0x20 that jumps to another address higher in the flash (after the FPGA image) or use a bootloader that will copy your application to RAM. The second option is easy to implement, you just have to configure your project so that the .text section (the one containing the code) is placed in RAM, but still put the reset vector in the flash. Then the Nios flash programmer will create a bootloader that will take care of everything for you. You can have a look at an458 (http://www.altera.com/literature/an/an458.pdf?gsa_pos=1&wt.oss_r=1&wt.oss=nios%20boot) for more details.- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Thank you xiwen :)
Today I tried to burn the flash with Nios II flash programmer,I specified my .sof file and the offset 0x20000,then programm.I got the message below:# !/bin/sh# # This file was automatically generated by the Nios II IDE Flash Programmer.# # It will be overwritten when the flash programmer options change.# cd D:/Copy_of_cosmic_2009/software/simple_socket_server_6/Debug # Creating .flash file for the FPGA configuration "$SOPC_KIT_NIOS2/bin/sof2flash" --offset=0x20000 --input="D:/Copy_of_cosmic_2009 /cosmic_top.sof" --output="cosmic_top.flash" Info: ******************************************************************* Info: Running Quartus II Convert_programming_file Info: Command: quartus_cpf --no_banner --convert D:/Copy_of_cosmic_2009/cosmic_t op.sof cosmic_top.rbf Info: Using INI file c:/altera/81/quartus/bin/quartus.ini Info: Quartus II Convert_programming_file was successful. 0 errors, 0 warnings Info: Peak virtual memory: 76 megabytes Info: Processing ended: Fri Feb 26 11:58:16 2010 Info: Elapsed time: 00:00:01 Info: Total CPU time (on all processors): 00:00:00 # Programming flash with the FPGA configuration "$SOPC_KIT_NIOS2/bin/nios2-flash-programmer" --base=0x01000000 --sidp=0x02203d48 --id=2052607805 --timestamp=1239120610 --instance=0 "cosmic_top.flash" Using cable "USB-Blaster [USB-0]", device 1, instance 0x00 Resetting and pausing target processor: OK Reading System ID at address 0x02203D48: verified : Checksumming existing contents 00020000 : Reading existing contents 00040000 : Reading existing contents 00060000 : Reading existing contents 00080000 : Reading existing contents 000A0000 : Reading existing contents 000C0000 : Reading existing contents Checksummed/read 67kB in 1.9s 00020000 ( 0%): Erasing 00040000 (16%): Erasing 00060000 (33%): Erasing 00080000 (50%): Erasing 000A0000 (66%): Erasing 000C0000 (83%): Erasing Erased 768kB in 5.0s (153.6kB/s) 00020000 ( 0%): Programming 00040000 (16%): Programming 00060000 (33%): Programming 00080000 (50%): Programming 000A0000 (66%): Programming 000C0000 (83%): Programming Programmed 702KB +66KB in 28.2s (27.2KB/s) Device contents checksummed OK Leaving target processor paused Seems actually the GUI just use two commands,one is for generating a flash file,and one is for programming the flash.The problem is after I switch off and on, I tried to run my software on the board but failed, seems like I didn't really burn the flash successfully.Are there any problems about the two commands?- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
It seems that it is only flashing the FPGA configuration and not the software. You probably have an option to tick somewhere. (I don't really know which one, I don't use the GUI...)
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Thank you xiwen.I submitted a support apply to altera, hope I can get answer soon.It's very strange that I can flash the hardware configuration but not the software,now I know the hardware confirguration start from 0x20000 and the software start at the reset offset address.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
When you say that the reset address is 0xe00000 in the flash, do you mean that it is in the flash with an offset of 0xe00000 (i.e. absolute address 0x1e00000)?
Because otherwise 0xe00000 isn't inside the flash address space. How big is the flash?- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Yes,you're right, what I mean is the offset address, I found when I burn the software to the flash by flash programmer, it starts from the offset address.
The flash address in SOPC is from 0x01000000 to 0x01ffffff,it's a 16MB flash.
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page