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Can niosII-32 run from 16bits datas width SRAM?

Altera_Forum
Honored Contributor II
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The altera 1c20 kits use two 16bits data width as a 32bits data width SRAM chip, i want to know is it possible to run niosii-32 in one 16bits data width SRAM chip? 

 

Thanks.
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Altera_Forum
Honored Contributor II
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of couse, it can. 

 

Please see "avalon bus specification"
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Altera_Forum
Honored Contributor II
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You could even run it from an 8 bit RAM chip. Bear in mind that performance will suffer, since the Avalon bus will have to make several RAM accesses to get each 32-bit instruction word.

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Altera_Forum
Honored Contributor II
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I have made a test program using 32bits on-chip memory to run simple printf("hello world") include in the main() function, it works fine, then only change 32bits on-chip memory to 16bits on-chip memory, others are not changed, it can not work, why? 

 

so i think that 32bits niosii-cpu can not run on the 16bits ram, is it right?
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Altera_Forum
Honored Contributor II
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There's nothing that should prevent you from using a memory that has a data width narrower or wider than 32 bits. Be sure, however, to pass the byte enables out to the memory, since this is how Avalon will control which bytes of the data are relevant. 

 

- slacker
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