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We have used a NIOS that boots from the epcs eeprom into a ddr bank before. It was on the Cygwin tools version of Quartus. We have actually done this a bunch of times.
The executable files have moved around, but I managed to use the same process with wsl that I was using with Cygwin.
/mnt/c/intelFPGA_lite/21.1/nios2eds/bin/sof2flash.exe --input=output_files/VXI_DA8.sof - output=hwimage.flash --epcs --verbose
/mnt/c/intelFPGA_lite/21.1/nios2eds/bin/elf2flash.exe --input=./mt_epcs.elf - output=swimage.flash --epcs --after=hwimage.flash --verbose
/mnt/c/intelFPGA_lite/21.1/nios2eds/bin/gnu/H-x86_64-mingw32/bin/nios2-elf-objcopy.exe -I srec -O ihex hwimage.flash hwimage.hex
/mnt/c/intelFPGA_lite/21.1/nios2eds/bin/gnu/H-x86_64-mingw32/bin/nios2-elf-objcopy.exe -I srec -O ihex swimage.flash swimage.hex
Then hwimage.hex and swimage.hex go into the jic.
I put a power up trigger into signal tap and watch it run, and it
never jumps into code.
It looks like the instruction pointer from the NIOS is waiting for
something to happen in the bootloader header in the epcs controller
IP. It says 0x24c, 0x250, 0x254, 0x24c, 0x250, 0x254, 0x24c, 0x250,
0x254, 0x24c, 0x250, 0x254, ...
Is there a known issue with this?
Does this work with the WSL version?
Thanks!!!
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Hi,
We may need further info on this to investigate the actual issue.
You mentioned it worked previously do you mean on older version, if so which were they? or on a different environment, Ubuntu etc.?
Were there any error/warning on on any platform on the Nios II SBT, Quartus, Platform Designer?
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Seems that is pretty much the whole story.
We debug with the NIOS vectors pointing to a DDR chip.
We move the NIOS vectors to the EPCS controller for production.
The old process was run in a cygwin window.
cd /cygdrive/c/altera/kits/PCIe_mini_A429_x4_Rev\ B
sof2flash --input=PCIe_miniARINC429.sof --output=hwimage.flash --epcs --verbose
elf2flash --input=./software/Arinc429firmware/Arinc429firmware.elf --output=swimage.flash --epcs --after=hwimage.flash --verbose
nios2-elf-objcopy -I srec -O ihex hwimage.flash hwimage.hex
nios2-elf-objcopy -I srec -O ihex swimage.flash swimage.hex
The 2 hex files and flash loader were combined into a jic file.
When the system powered on, the NIOS booted from the EPCS and jumped into the ddr to run.
The new process is wsl
/mnt/c/intelFPGA_lite/21.1/nios2eds/bin/sof2flash.exe --input=output_files/VXI_DA8.sof --output=hwimage.flash --epcs --verbose
/mnt/c/intelFPGA_lite/21.1/nios2eds/bin/elf2flash.exe --input=./mt_epcs.elf --output=swimage.flash --epcs --after=hwimage.flash --verbose
/mnt/c/intelFPGA_lite/21.1/nios2eds/bin/gnu/H-x86_64-mingw32/bin/nios2-elf-objcopy.exe -I srec -O ihex hwimage.flash hwimage.hex
/mnt/c/intelFPGA_lite/21.1/nios2eds/bin/gnu/H-x86_64-mingw32/bin/nios2-elf-objcopy.exe -I srec -O ihex swimage.flash swimage.hex
The 2 hex files and flash loader were combined into a jic file.
When the system powered on, the NIOS instuction pointer is looping the code that comes with the EPCS controller IP.
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Hi,
As of now, we recommend that you use the Quartus version with the CYGWIN. We are still working on getting issue.
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So Intel is saying that Windows 7 is required to boot a NIOS from a configuration memory?
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Hi,
You need to check the WSL version, WSL 2 is not supported.
Check these following steps for booting from EPCQ:
https://www.intel.com/content/www/us/en/docs/programmable/683689/current/programming-96050.html
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Hi,
Do you have any latest update for this issue?
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Hi,
As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.
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