Re: IDT SRAM

Altera_Forum · ‎10-08-2006

hello

I am working with stratix II EP2S60.

I cant find any documents about nios programming for sram (IDT SRAM).

for example, how can i write a 32 bit data in known address in nios.

thanks

Altera_Forum · ‎10-09-2006

Dear,

Writing a 32 bit value can be easily done with a NIOS core.

For example:

You make use of a SRAM which has a 32bit databus. You can access this 32b

bus with your NIOS core for example by use of a 32 bit parallel IO bus

(GPIO 32 bit), called SRAM_DATABUS.

Writing to this bus, you can easily do with following pointer instruction. The address is defined in your system.h file.

volatile unsigned int * data = (unsigned int *) (SRAM_DATABUS_BASE);

*data = 0xFFAAFFAA;

The same procedure you can use for writting the SRAM CSn, WRn, RDn, ....

Of course, take into account timigs (setup time, hold time,...) of you SRAM device.

Regards

Karel

Altera_Forum · ‎10-09-2006

You may also use the IORD/IOWR_32DIRECT functions

Altera_Forum · ‎10-10-2006

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originally posted by jdhar@Oct 9 2006, 11:37 PM

you may also use the iord/iowr_32direct functions

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I use these 2 functions but i can just write to memory with IOWR_32DIRECT() and i cant read data with IORD_32DIRECT()

Altera_Forum · ‎10-27-2006

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originally posted by m_llaa+oct 10 2006, 03:30 am--><div class='quotetop'>quote (m_llaa @ oct 10 2006, 03:30 am)</div>

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<!--quotebegin-jdhar@Oct 9 2006, 11:37 PM

you may also use the iord/iowr_32direct functions

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=18611)

--- quote end ---

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I use these 2 functions but i can just write to memory with IOWR_32DIRECT() and i cant read data with IORD_32DIRECT()

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=18618)</div>

[/b]

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What do you mean you can't read?

If you're not seeing the read strobes on the chip, you might be accessing a cached value. Set bit 31 in the read address to bypass the cache.

Altera_Forum · ‎10-29-2006

Hi gomiboy

I am using SRAM with 1024KB, then I have 20 bits for addressing.

this is my simple program in nios. I can write and read.

for(i=1;i<30;i++)

{

IOWR_32DIRECT(BASE_SRAM,4*i,i+1);

for(beta=1;beta<5;beta++)

{

}

alpha = IORD_32DIRECT(BASE_SRAM,4*i);

printf("%x\t",alpha);

}

but

if in second "for" I increse delay for example for(beta=1;beta<10;beta++)

when I read from SRAM i can just read 0xffffffff

Altera_Forum · ‎03-02-2007

--- Quote Start ---

originally posted by m_llaa@Oct 29 2006, 06:18 AM

hi gomiboy

i am using sram with 1024kb, then i have 20 bits for addressing.

this is my simple program in nios. i can write and read.

for(i=1;i<30;i++)

{

iowr_32direct(base_sram,4*i,i+1);

for(beta=1;beta<5;beta++)

{

}

alpha = iord_32direct(base_sram,4*i);

printf("%x\t",alpha);

}

but

if in second "for" i increse delay for example for(beta=1;beta<10;beta++)

when i read from sram i can just read 0xffffffff

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=18990)

--- quote end ---

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was anybody able to resolve these issues? i am using IOWR/RD_32DIRECT, in fact i copied and pasted above code into my program, but was unable to write to or read from the SRAM on the DE2 board. furthermore, when i attempt to read from the SRAM, it is overwritten. any ideas?