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We're back with another issue. There could be a simple solution to this since this is our first project using Quartus/SOPC Builder/Nios II. Regardless, our problem is as follows:
We have SUCCESSFULLY created our board set-up in SOPC Builder and Successfully programmed our .pof FPGA Configuration file into our EPCS4 memory on our board. It is successfully booting this config when we turn the power off and turn it back on (meaning the board demo no longer happens on boot). We did all this through quartus 6.1 Now we are trying to load our Nios II project into flash memory so when we boot up our program code runs. Assumptions being made: - That we are to use the Tools -> Flash Programmer - That once in flash programmer the only option we need checked is the first one the "Program software project into flash memory" - That we do not need to check the option to program the FPGA Config file because isn't that what we did in quartus with the .pof file? With these assumptions in mind we select the project we want to program and no other options... we select Program Flash and it builds the project then all we see in the Console window is the following: #!/bin/sh# # This file was automatically generated by the Nios II IDE Flash Programmer.# # It will be overwritten when the flash programmer options change.# cd C:/DE1/DE1_demonstrations/DE1_NIOS/software/Media_Center_X/Release accompanied by a message in the debug window saying "<terminated, exit value: 0> 'Our Project'.sh This is all the troubleshooting info we get.. and aren't really sure where this is going wrong or what we're doing... ANY direction on this would be great. Thanks a lot!Link Copied
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You've got to watch where you point your Reset Address in your SOPC Builder system. This will determine:
1. Where your software code gets placed. [EDIT: Not quite, but you should still follow my advice, below...about the Reset Address] 2. Which bootloader to prepend to your code. So, where do you have your Reset Address pointed? It should be towards the base of your CFI memory. Also, as a side point, you should be able to use the flash programmer to program your EPCS device, as well. Just make sure you have an epcs_controller in your system, and give it a try. The idea being, here, that you should be able to do all from within a single GUI. Now, I only have one concern.... The DE1 (and DE2 for that matter) kind of differ from "typical" Altera Dev. Kits, so I'm not sure you can expect this level of convenience with these two boards. Cheers, and Good Luck! - slacker- Mark as New
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Our reset is set at 0x0 and our base is 0x00000000 there was some slight progress when I realized that the reference designator for the flash memory was not set right in SOPC builder and now I am getting the following out of the console window
# !/bin/sh# # This file was automatically generated by the Nios II IDE Flash Programmer.# # It will be overwritten when the flash programmer options change.# cd C:/DE1/DE1_demonstrations/DE1_NIOS/software/Media_Center_X/Release # Creating .flash file for the project "$SOPC_KIT_NIOS2/bin/elf2flash" --base=0x00000000 --end=0x3fffff --reset=0x0 --i nput="Media_Center_X.elf" --output="cfi_flash_0.flash" --boot="C:/altera/61/ip/n ios2_ip/altera_nios2/boot_loader_cfi.srec" # Programming flash with the project "$SOPC_KIT_NIOS2/bin/nios2-flash-programmer" --base=0x00000000 --cable='USB-Blas ter [USB-0]' "cfi_flash_0.flash" Using cable "USB-Blaster [USB-0]", device 1, instance 0x00 Resetting and pausing target processor: OK : Checksumming existing contents 00000000 : Verifying existing contents Checksummed/read 1kB in 0.0s Erase not required 00000000 ( 0%): Programming Programmed 1KB in 0.0s No change to device contents Leaving target processor paused Since the "little" omission of the reference designator in SOPC builder got it to progress this far I am starting to think maybe I have something assigned wrong in Quartus? I am thinking of that as an option (and looking into as soon as this is posted) if it doesn't look like a common situation associated with the Nios II programming process. I swear one of these times we'll get it right. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/tongue.gif- Mark as New
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--- Quote Start --- originally posted by zippyua@Feb 5 2007, 09:54 AM #!/bin/sh# # this file was automatically generated by the nios ii ide flash programmer.# # it will be overwritten when the flash programmer options change.#
cd c:/de1/de1_demonstrations/de1_nios/software/media_center_x/release
# creating .flash file for the project
"$sopc_kit_nios2/bin/elf2flash" --base=0x00000000 --end=0x3fffff --reset=0x0 --i
nput="media_center_x.elf" --output="cfi_flash_0.flash" --boot="c:/altera/61/ip/n
ios2_ip/altera_nios2/boot_loader_cfi.srec"
# programming flash with the project
"$sopc_kit_nios2/bin/nios2-flash-programmer" --base=0x00000000 --cable='usb-blas
ter [usb-0]' "cfi_flash_0.flash"
using cable "usb-blaster [usb-0]", device 1, instance 0x00
resetting and pausing target processor: ok
: checksumming existing contents
00000000 : verifying existing contents
checksummed/read 1kb in 0.0s
erase not required
00000000 ( 0%): programming
programmed 1kb in 0.0s
no change to device contents
leaving target processor paused
since the "little" omission of the reference designator in sopc builder got it to progress this far i am starting to think maybe i have something assigned wrong in quartus? i am thinking of that as an option (and looking into as soon as this is posted) if it doesn't look like a common situation associated with the nios ii programming process. i swear one of these times we'll get it right. http://forum.niosforum.com/work2/style_emoticons/<#emo_dir#>/tongue.gif
<div align='right'><{post_snapback}> (index.php?act=findpost&pid=21250)
--- quote end ---
--- Quote End --- This looks like it's working (from the messages), but is your code size really only 1KB? Where have you placed your various code sections (in the System Library project)? i.e.: .text, .rodata, .rwdata. With the method that I "think" you want to use, they should ALL be located in your volatile memory. To see where you code is being placed, check the options to generate an objdump (or do so manually). Look at the IDE's online help for details. Cheers, - slacker
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Ok we created the Objdump file and have the first chunk of the file posted below. The first thing that caught our eye is a lot of the files that seem to be included ".rodata ect. ect." appear to say they are of size 000000. Should they be zero or should they actually be something? Let me know if you need anymore of the objdump file posted. Thanks!
Also, is it a problem that the start address is said to be 0x00400000 when our flash memory size is 0x003fffff? Media_Center_X.elf: file format elf32-littlenios2 Media_Center_X.elf architecture: nios2, flags 0x00000112: EXEC_P, HAS_SYMS, D_PAGED start address 0x00400000 Program Header: LOAD off 0x00000094 vaddr 0x00000000 paddr 0x00000000 align 2**0 filesz 0x00000000 memsz 0x00000000 flags r-x LOAD off 0x00000094 vaddr 0x00400000 paddr 0x00400000 align 2**0 filesz 0x000000b0 memsz 0x000000b0 flags r-x LOAD off 0x00000144 vaddr 0x00800020 paddr 0x00800020 align 2**0 filesz 0x00000000 memsz 0x00000000 flags rw- Sections: Idx Name Size VMA LMA File off Algn 0 .entry 00000000 00000000 00000000 00000094 2**5 CONTENTS, ALLOC, LOAD, READONLY, CODE 1 .exceptions 00000000 00800020 00800020 00000144 2**0 CONTENTS 2 .text 000000b0 00400000 00400000 00000094 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 3 .rodata 00000000 004000b0 004000b0 00000144 2**0 CONTENTS 4 .rwdata 00000000 00800020 00800020 00000144 2**0 CONTENTS, ALLOC, LOAD, DATA 5 .bss 00000000 00800020 00800020 00000144 2**0 ALLOC 6 .sdram_0 00000000 00800020 00800020 00000144 2**0 CONTENTS 7 .epcs_controller 00000000 00480800 00480800 00000144 2**0 CONTENTS 8 .sram_0 00000000 004000b0 004000b0 00000144 2**0 CONTENTS 9 .cfi_flash_0 00000000 00000020 00000020 00000144 2**0 CONTENTS 10 .comment 0000002c 00000000 00000000 00000144 2**0 CONTENTS, READONLY 11 .debug_aranges 00000040 00000000 00000000 00000170 2**3 CONTENTS, READONLY, DEBUGGING 12 .debug_pubnames 0000001f 00000000 00000000 000001b0 2**0 CONTENTS, READONLY, DEBUGGING 13 .debug_info 0000016c 00000000 00000000 000001cf 2**0 CONTENTS, READONLY, DEBUGGING 14 .debug_abbrev 0000007a 00000000 00000000 0000033b 2**0 CONTENTS, READONLY, DEBUGGING 15 .debug_line 00000175 00000000 00000000 000003b5 2**0 CONTENTS, READONLY, DEBUGGING 16 .debug_frame 00000028 00000000 00000000 0000052c 2**2 CONTENTS, READONLY, DEBUGGING 17 .debug_str 000000dc 00000000 00000000 00000554 2**0 CONTENTS, READONLY, DEBUGGING 18 .debug_alt_sim_info 00000020 00000000 00000000 00000630 2**2 CONTENTS, READONLY, DEBUGGING- Mark as New
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PROBLEM SOLVED!
Nevermind the previous post. The Flash memory WAS getting programmed however in a previous tutorial we ran through it had us change options in the project system library. We never returned these to default after the tutorial. Once we returned the settings to default in the project system library properties BINGO. Thanks for all your input thus far slacker! IF anyone knows a good source to get information on a c/c++ vga controller that would help out alot. This board will be controlling a 640x480 LCD touchscreen display. Would rather write the code in C than VHDL. THANKS!- Mark as New
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Hi again,
You're talking about more than just a VGA controller, you'll have to implement the touchscreen stuff, as well. The portable reference platform (http://www.niosforum.com/pages/project_details.php?p_id=77&t_id=45), though likely designed for different hardware, should give you a good start. BTW, there's no way you can get around doing some hardware stuff....or, at least, understanding how to connect the RTL modules up and use them. Software can't handle the speeds at which the screen needs to be refreshed. Cheers, - slacker
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