Hello,
I am working around the NIOSV processor these days. As per the requirement I need to configure a design where NIOSV is used as CPU and On Chip Ram is used as program memory. The data width of On-Chip-Ram must be 16 bits.
I am able to build the software project and run the ELF through On-Chip-Ram. But my NIOSV code does not get executed. On running the ELF through Debugging Mode(Ashling RISC-Free), I found out that it is not able to access the memory at some address point. I am facing this issue only when the data width of On-Chip-Ram is 16 bits. Everything works fine if the Data Width of On-Chip-Ram is 32 bits.
Please find the attached document and reference design for your reference.
Kindly suggest any solution to resolve the issues.
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Hi,
I would like to continue the support in IPS. Can you please share more details on where can I access the IPS system ?
Thanks !!
Hi,
The Quartus Version I am using is : Quartus Prime Standard 22.1.1
RiscFree IDE Version : 22.1std
Hello,
Any update regarding the issue from your side ?
Please share your response !!
Regards,
Himanshu
Hi there,
Has this issue been resolved? Currently seeing very similar issues with Q23.4. Works fine the first time, then restarting debug gives the same error. Have to reload the SOF.
Thx!
Hi,
We will keep track the status update in IPS. I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.
