Warning: uniphy_ddr2_1.HCX_reconfig: Interface has no signals (SOPC builder)

Altera_Forum · ‎10-06-2010

Hello,

I'm creating a NIOS 2 system with the Quartus 10.0 SOPC builder. I need to include a

DDR2 SDRAM Controller with UniPHY (New!)

Everything is well, but I have the following (error) warning.

warning: uniphy_ddr2_1.hcx_reconfig: interface has no signals.

I'm not sure what it means or how I could fix it. Anyone has a clue? I'm using a clock crossing as well.

Altera_Forum · ‎10-06-2010

Hi,

first of all you get a warning not an error. So your design could run properly. I have not used this controller yet, but I just was interested in. I found a sheet were you can get some informations:

http://www.altera.com/literature/hb/external-memory/emi_ddr3up_ug.pdf

On page 96 you can find the signals for pll_reconfiguration. I think this is your reconfiguration port. If you generate your files with the sopc-builder do you get these signals? If you don´t want to reconfigure the PLL you don´t have to care about this massage I think.

Altera_Forum · ‎10-07-2010

Yeah I ment a warning. And indeed it could not be bad, but I'd like to be sure, especially since it's quite a strange warning (to me).

Page 96 doesn't exist, so I suppose you ment page 69. The signals there are hardcopy (hc) signals. Since I don't use hardcopy I don't get those signals.

But, if I tick the hardcopy option on, the warning goes away. So I now also think that warning is harmless.

Thanks :).

Altera_Forum · ‎10-07-2010

Hi,

I think you get the warning because you are using the device in SOPC. If you use the Megawizard outside the sopc, the port will be available. It seems to be just a kind of a reminder for you that you are not able to reconfigure from sopc.