control registers

[Altera_Forum]

Ok, so since I need multi-threading to work, and since adding a compare-and-exchange instruction is out of the question since interfacing with SDRAM is too difficult from a custom instruction, the obvious way to do mutexing and other multi-threaded operations is by disabling interrupts every time any of the mutexing (etc) operations take place. Simple enough in the kernel (that's how all of the atomic operations are already implemented). 

 But is it possible to disable interrupts in userspace? Specifically, does microtronix uClinux put the CPU into "user mode" (i.e. the mode where code can't access the control registers) for userspace code, or can userspace code get at the control registers (in order to set ctrl0[0] (PIE) to 0 and then to 1 again)?  Thanks.

[Altera_Forum]

And, more to the point, if userspace code runs in user-mode rather than supervisor mode (i.e. you can't run the rdctl and wrctl instructions), how does one disable that so that all code in uClinux runs in supervisor mode (i.e. you can run the rdctl and wrctl instructions)?

[Altera_Forum]

At this point, the pthread in uClibc for Nios II uses disabling interrupts to achieve the testandset functionality, required to implement spinlocks. Right now both kernel and user applicaitons work in supervisor state. 

 When Linux was ported to Nios II, user mode was not supported. I am not sure if it is supported now. I guess Altera will provide a test-and-set style instruction when they begin to support user space.

[Altera_Forum]

Thanks.