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Endpoint Device TLB support in VT-d

RGupt29
Beginner
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Following document talks about Device TLB support by VT-d(Chapter 4) in DMA remapping structure.

 

https://software.intel.com/en-us/download/intel-virtualization-technology-for-directed-io-architecture-specification

 

Which Intel chipset onwards this support was added in VT-d ?

 

I am using "Intel(R) Xeon(R) CPU E5-2603 v4 @ 1.70GHz" . How to figure out if this had Device TLB support or not ?

 

Thanks,

Rishabh

 

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JoseH_Intel
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Hello RGupt29, Thank you for joining the community. We will investigate further on this and will let you know as soon as we have updates. Regards. Jose A. Intel Customer Support Technician Under Contract to Intel Corporation
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RGupt29
Beginner
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Thanks a lot Jose. Please let me if I can provide you any more info about the my question.

 

Rishabh

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JoseH_Intel
Moderator
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Hello RGupt29, We got a reply from engineering. It was found that the older Ivy Bridge processor generation already supported TLB, which been older than your processor (Xeon(R) CPU E5-2603 v4 ) which is a Broadwell generation, then it is perfectly fine stating it does support it as well. The reason why this is been inferred this way is because the documentation has been moved due to resent releases and are not available where they used to be. This is why it is a bit difficult to find information. Does this answer your question? I hope it does. If not just let me know. Regards Jose A. Intel Customer Support Technician Under Contract to Intel Corporation
RGupt29
Beginner
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Thanks a lot Jose for getting back to me on this. Is there anyway I can check about this feature(Device TLB) support on a Linux system. Any command displaying info about this feature ?

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JoseH_Intel
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Hello RGupt29, Besides the most common ones I found the following: * lscpu will display if virtualization feature is present lscpu Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 4 Virtualization: VT-x * cpuid | grep -i tlb will display the TLB information cpuid | grep -i tlb cache and TLB information (2): 0x5a: data TLB: 2M/4M pages, 4-way, 32 entries 0x03: data TLB: 4K pages, 4-way, 64 entries 0x55: instruction TLB: 2M/4M pages, fully, 7 entries 0xb2: instruction TLB: 4K, 4-way, 64 entries 0xca: L2 TLB: 4K, 4-way, 512 entries Not sure if this is what you are looking for. Hope it helps Jose A. Intel Customer Support Technician Under Contract to Intel Corporation
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JoseH_Intel
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Hello RGupt29, Do you have any further details, updates, questions or comments in regards to this issue? This thread will be marked as resolved automatically in the next 72 hours if no activity is received. Regards Jose A. Intel Customer Support Technician Under Contract to Intel Corporation
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JoseH_Intel
Moderator
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Hello RGupt29, We will proceed to mark this thread as resolved. If you have further issues or questions just go ahead and create a new topic. Jose A. Intel Customer Support Technician Under Contract to Intel Corporation
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