Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

10G Ethernet

Joshua_Willson
Beginner
632 Views

I am looking to implement multiple 10G ethernet ports on the stratix 10 SX devkit. Alot of these development boards have QSFP28. 

To my knowledge QSFP28 should be backwards compatible with QSFP+, and then using an adapter I can break out the QSFP+ to 4 individual 10G ethernet ports. 

 

Have any one ever done this before on the devkit? Can I just create 3 10GB MACs w/ the multi-rate phy, and connect the 10Gps lines to the corresponding 4 RX and 4TX lines meant for the 28Gps lines for the 100G.

 

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ZiYing_Intel
Employee
433 Views

Hi Joshua,


Thanks for submitting the issue.

Allow me have some time to look into your issue and I will get back to you with findings.


Best regards,

Zi Ying


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ZiYing_Intel
Employee
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Hi Joshua,

 

"connect the 10Gps lines to the corresponding 4 RX and 4TX lines meant for the 28Gps lines for the 100G."

Do you means that the 4x10G MAC IP connect to the QSFP+ and then connect to QSFP28? if yes, you only will get an output of 40G since the maximum 10G will be given out from MAC.

 

For the multiple 10G MAC with multirate PHY, I utilized the example design that is generated from the LL 10G MAC IP GUI and then add 2 more 10G MAC+PHY into the example design. It was being compiled successfully from my side.

 

If you wish to implement 100G design, your design should be 25Gx4. I would like to suggest you to use either 25G IP or LL 100G IP.

 

Best regards,

Zi Ying

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ZiYing_Intel
Employee
385 Views

Hi Joshua,

 

Since I addressed your question and no hear any feedback from you, I am now close this case.

If you still have any questions after the case closed, please do feel free submit another issue.

 

Best regards,

Zi Ying

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