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I designed a startup signal in the module, but after powering on, I found that the module did not perform the expected function. Using signal tap, it was found that subsequent signals driven by this signal are not captured. But when I added this signal to the signal tap, the system can run normally again. May I ask what may be causing this? Sorry, I cannot provide the code. I only hope to receive some possible reasons and suggestions.
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You should be able to explain the "startup signal" scheme by giving some example code.
A "popular" reason for similar problems is missing synchronization of reset release. Respectively design behaviour depends on arbitrary routing delays and changes e.g. when adding Signaltap.
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Also make sure your design is meeting timing. Adding Signal Tap could have affected the timing of the design, allowing it to actually work, but your design should be constrained and meet timing even if Signal Tap is not present.
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i) As mentioned by sstrell, it is possible that there are timing issues in your design that are affecting the functionality of the startup signal. Adding the signal to SignalTap might be introducing additional delays that help correct these timing issues temporarily. You might need to review your timing constraints and ensure that all paths are properly constrained.
ii) Try to run a simulation to ensure that the design function correctly.
iii) Like what FvM stated, if the startup signal is related to system reset or initialization, ensure that it's synchronized properly across different clock domains. Un-synchronized resets can cause unpredictable behavior during startup.
Regards,
Richard Tan
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We noticed that we haven't received a response from you regarding the latest previous question/reply/answer, and will now transitioning your inquiry to our community support. We apologize for any inconvenience this may cause and we appreciate your understanding.
If you have any further questions or concerns, please don't hesitate to let us know.
Thank you for reaching out to us!
Best Regards,
Richard Tan
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