Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21602 Discussions

Arria II GX Transceiver rx_syncstatus Not Asserted

Altera_Forum
Honored Contributor II
‎05-02-2011 06:41 PM
1,078 Views

To Whom It May Concern: 

I am working on a 3.0 Gbps transceiver design in an Arria II GX device. I am using the basic ALTGX megafunction with manual word align. Right now, I am trying to receive data from an external device. 

 

After going through the reset sequence as prescribed in the Arria II Handbook, I switch over from rx_locktorefclk to rx_locktodata. Then, after I deassert rx_digitalreset, I start looking for a pattern to be received from the external device by asserting rx_enapatternalign. 

 

Whenever I am receiving the correct decoded pattern from the external device on rx_dataout without disparity errors, I always see rx_patterndetect being asserted. However, sometimes rx_syncstatus is asserted on the first pattern detect, but many times it is not. Does anyone know why rx_syncstatus might not be asserted even though I'm seeing rx_patterndetect assert? 

 

Please let me know if additional information would help answer my question.
0 Kudos

Link Copied

1 Reply
Altera_Forum
Honored Contributor II
‎06-01-2011 09:33 PM
404 Views

Similar to my other post, I found I had to wait until I was seeing data to assert rx_enapatternalign. Then, the transceiver behaved as expected.

0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.