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KCHUN4
Beginner
771 Views

Arria V GX DDR Calibration Write Leveling

I am used DDR Controller of Arria V.

I known that DDR Controller PHY's Calibration have 4 Stages.

Stage1. Read calibration part one - DQS enable calibration and DQ/DQS contering

Stage2. Write calibration part one - leveling

Stage3. Write calibration part two - DQ/DQS centering

Stage4. Read calibration part two - Read latency minimization

But I known that Arria V is not supported Write Leveling at DDR Controller Calibration.

So then, What does 'Calibration Sequencer of Arria V DDR Controller PHY' doing at 'stage2 Write Leveling'?

 

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1 Reply
Deshi_Intel
Moderator
39 Views

Hi KCHUN4,

 

The calibration process flow is generic explanation. For unique case like Cyclone V and Arria V that doesn't support leveling calibration, the particular calibration process will be skipped.

 

Thanks. ​

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