Behaviour of MAX without VCCIO supply?

[17ADenis]

During a structural test of a board with a MAX10 FPGA (manufacturing test, only one time performed), I need to shut-down a DC/DC of the board during about 10 seconds. As a consequence, the core of MAX10 FPGA will be supplied nominally when the all VCCIO not. Is this configuration acceptable for the MAX10? Is there a risk in that situation?

Note : During the test, it is not request that the FPGA is operational.

Thanks,

Denis.

[YuanLi_S_Intel]

Hi Denis,

It should be fine. The reason is because MAX10 has hot socketing feature which allows the MAX 10 to be removed or inserted during the middle of system operation.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_pwr.pdf (Page 11)

Thank You.