Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Avisos
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
21615 Discusiones

CPLD frequency doubling

Altera_Forum
Colaborador Distinguido II
1.257 Vistas

hi, 

there is no pll or dll in CPLD  

I want to use CPLD to drive CCD,but have a problem,the clk must be 4 times,example 40Mhz input ,must be exitence 160Mhz。 

how can i do ?
0 kudos
2 Respuestas
Altera_Forum
Colaborador Distinguido II
548 Vistas

The CPLD don't have PLLs so you'll have to use an external pll or clock generator.

Altera_Forum
Colaborador Distinguido II
548 Vistas

thank you !!

Responder