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CPM220 standard

MamaSaru
New Contributor I
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RichardTanSY_Altera
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Sorry, as a disclaimer: we no longer support MAX PLUS II-related issues as it is obsolete.

Since this KDB was created in 2006, which was a very long time ago, I don't have information on who created it initially.

Also, I tried to check the database for any information related to CPM220 Standard, but unfortunately, there is none.


If it is not relevant anymore, then I can help to remove the line "The eq[] port is not supported by the CPM220 standard." to avoid confusion.


Best Regards,

Richard Tan


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FvM
Honored Contributor II
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Hi,
isn't CPM220 related to "LPM version 220 (EIA-IS103 October 1998)"? See comment in 220model source.

Regards

Frank

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MamaSaru
New Contributor I
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Hi Frank,
Thank you very much for the important information.
I searched EIA-IS103 and got below explanation from EIA page:
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EIA/IS-103-A
Library of Parameterized Modules (LPM) Version 2.0
The objective of the LPM standard is to allow efficient access to unique architectures (such as those found in FPGA products) to a wider group of designers who lack a detailed knowledge of the vendor’s silicon architecture.
This access is provided via synthesis tools and other design entry systems.
Through the LPM standard, designs can remain technology independent longer.
The user is freed from the need to know or decide upon the implementation technology until later in the design flow.
The designer’s entry tools can be completely independent of the target technology and rely on synthesis tools to map the design to the target technology.
The objective of LPM is to provide a generic, technology independent set of logical primitives with which to construct a design and get efficient performance from a wide array of technologies.
---

Regards,

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RichardTanSY_Altera
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That might be it. It could be a typo—should be LPM 220 standard instead of CPM 220 standard.

By the way, great catch!

 

Best Regards,

Richard Tan

 

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RichardTanSY_Altera
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I have asked the team to change CPM220 to LPM220 in the KDB. The changes will take some time and will be reflected soon.

 

Now, I will transition this thread to community support. If you have any further questions or concerns, please don't hesitate to reach out.

Thank you and have a great day!

 

Best Regards,

Richard Tan

 

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MamaSaru
New Contributor I
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Richard,
Thank you for your effort.
It will help to make Intel FPGA more usable.
Regards,
Masaru Naganuma

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