CRC Error without Pull-up Resistor

[Jacob494]

Will the CRC Error Pin be driven high by the FPGA when a CRC Error occurs, even if no external pull-up resistor is present? (Assuming "Enable error detection CRC" is enabled and "Enable open drain on CRC_ERROR pin" is NOT enabled.)

The documentation I have found so far has been somewhat ambiguous:

https://www.intel.com/content/www/us/en/docs/programmable/683777/current/crc-error-pin.html

I am working on a Cyclone 10 LP device.

[FvM]

Hi,
I feel the device handbook is pretty clear about CRC error pin operation with open drain disabled.

"To set the CRC_ERROR pin as output open drain, turn on Enable open drain on CRC_ERROR pin. Turning off this option sets the CRC_ERROR pin as output."