CRC Error without Pull-up Resistor

[Jacob494]

Will the CRC Error Pin be driven high by the FPGA when a CRC Error occurs, even if no external pull-up resistor is present? (Assuming "Enable error detection CRC" is enabled and "Enable open drain on CRC_ERROR pin" is NOT enabled.)

The documentation I have found so far has been somewhat ambiguous:

https://www.intel.com/content/www/us/en/docs/programmable/683777/current/crc-error-pin.html

I am working on a Cyclone 10 LP device.

[FvM]

Hi,
I feel the device handbook is pretty clear about CRC error pin operation with open drain disabled.

"To set the CRC_ERROR pin as output open drain, turn on Enable open drain on CRC_ERROR pin. Turning off this option sets the CRC_ERROR pin as output."

[Fakhrul]

Hi,

Thanks to FvM for the helpful answer! I just wanted to check if you have any further questions or concerns regarding this case. Please don’t hesitate to let us know if there’s anything else we can assist you with.

If we don’t hear back from you soon, this thread will be marked inactive and transitioned to community support.

Thank you for your understanding.

Best regards,

Fakhrul

[Fakhrul]

As we haven't received a response to our previous notification, this thread will be transitioned to community support. We hope all your concerns have been addressed. If you have any new questions, please feel free to open a new thread to receive support from Intel experts. Otherwise, community users will continue to assist you here. Thank you.