Can the EMIF IP core remaining IO be used ?

[allen18]

Hi :

I have instantiated a 16-bit hard DDR4 controller in my project. It will occupy 2 banks and 51 IO pins. The two banks have a total of 96 pins. Excluding the 51 pins occupied by the DDR4 controller, can the remaining pins be used as general-purpose IO pins operating at 1.8V for implementing other functions such as SPI communication or other control functions ?

[allen18]

I use the Stratix10 1SX110HN2F43I2VG device

[allen18 · Accepted solution]

It should not be feasible, incompatible voltage standard