Can the MAX10 FPGA, 10M02SCE144 package pins 77 and pin 116 be used as general purpose pins ? Dito for 10M50SCE144, pins 30, 50, 58, 62, 80,135 ?

[KNylu]

The 10M02SCE144 package -pin 77 and 116 do not have any designation regarding IO performance at all. Same with 10M50SCE144 pins 30, 50, 58, 62, 80,135.

The xls and pdf pin files (on Intel website) for these package do not classify them as "low speed" or "high speed".

Quartus I/O assignment analysis does not report an error for my signals connected to these pins.

Can I really use them as general purpose pins ?

What are the limitations for these pins ?

[Rahul_S_Intel1]

Hi , These pins can be used for GPIO but cannot be used as differential pair. These pins usually comes for migration of the devices