Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Change between boards.

Altera_Forum
Honored Contributor II
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Hello everyone, 

I am out of ideas for fixing my issue so i hope some of you will can help me to. 

I am using the hmc-dvi from terasic board with two development kits. 

I made a design that just shorts the reciever and transmitted data, hs,vs,de and clk, and configures the transmitter. 

When using a Cyclone IV development kit (veek) everything works perfectly. 

When changing to a Cyclone V SoC development kit with same design (just reconfiguring pins) i see the image in my monitor like its less bits per color. 

My guess is that the board makes some skew in clock or in data, but cant seem to find if thats the problem and if is, how to fix it. 

 

It doesnt seems to be the transmitter as sending a pattern using test pattern generator works good 

 

Hope someone will be able to help and thanks in advance
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Altera_Forum
Honored Contributor II
247 Views

Have you got a design that fully meets timing in both boards? have to got the correct timing specs for both? is it a fully synchronous design?

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Altera_Forum
Honored Contributor II
247 Views

 

--- Quote Start ---  

Have you got a design that fully meets timing in both boards? have to got the correct timing specs for both? is it a fully synchronous design? 

--- Quote End ---  

 

 

After testing the timing requirements, found out that 3 of the rx data lines have a really big delay because their input and output are too far away. I cannot change the pins themselves.. Any simple way to syncronize the outputs ? I can live with all signals equally delayed...
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