Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21088 Discussions

Clock capability of Cyclone V 5CGXFC5C6F27C7N

Altera_Forum
Honored Contributor II
‎04-05-2018 12:09 AM
1,089 Views

I am trying to run the a Cyclone V 5CGXFC5C6F27C7N using the PLL at 500Mhz. How does this part react to that clock frequency? Has any one done that, also I'm using it on the Terasic Cyclone V GX Starter Kit.

0 Kudos

Link Copied

1 Reply
Altera_Forum
Honored Contributor II
‎04-05-2018 01:43 AM
386 Views

Hi, 

 

The value is under the specification you can operate at 622 MHz. Normal operation is expected.  

But limited in the Quartus Prime software by the I/O maximum frequency. The maximum I/O frequency is different for each I/O standard. 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.