Clock on CFI Flash Memory

[Altera_Forum]

Hi, i don't understand why there is not the clock pin in my flash memory. 

I use De2 Altera board and there is the off-chip flash memory S29AL032D. I try to use this memory without sopc builder but in the datasheet there is not the clock pin...  How can i assign the internal pin of the board to this memory? How can i change the clock frequency of this memory? Thank you.

[Altera_Forum]

Memory devices like S26AL032D have no clock pin. 

They need no clock information as they are asyncronus devices. so there is no need to assing any clock as you won't find a clock pin at such devices to connect to  so you can't change the frequency of these components.  all you can do is to change the device speed by buying faster devices. the only thing you must obey is the timing relationship these devices have between several signals and these information are available from thier datesheet.  thats the reason why inside sopc builder you just assign  - setup - access - hold timinig values  as a fpga is normaly a fully syncronus design and based upon a clock, the sopc builder calculated the counter values needed to meet these timings.

[Altera_Forum]

thank you so much!

[Altera_Forum]

sorry for the question. 

Are you sure that is possible use the flash memory without sopc builder? I try to use it but in data out pin i read nothing.  I've created an entity   entity nuovoflash is   port (  resetgenerale: in std_logic;  clock: in std_logic;  address : out STD_LOGIC_vector (21 downto 0);  data : INout STD_LOGIC_vector (7 downto 0);  ingressi: buffer std_logic_vector (7 downto 0);  uscite : out std_logic_vector (7 downto 0);   chipenable : out STD_LOGIC;  outputenable :out std_logic ;  reset : out STD_LOGIC;  writeenable : out STD_LOGIC    ); end nuovoflash;  The output pins are controlled by a fsm controller. In the modelsim simulation the signals are good. The memory should work but it doesn't work.  I've also created an interface entity to separate the data inout in data in and data out but i don't read the output bit from the oscilloscope when i connect the board to it.

[Altera_Forum]

yes it is definitly posible 

max II is used to read cfi memory and store its content as fpga image for initialisation  the cfi ip inside sopc builder does nothing special except the fsm for controlling the access

[Altera_Forum]

Have you tried using SoPC builder and NIOS to verify that the flash indeed works? 

 Jake

[Altera_Forum]

jacobjones i can't use sopc builder because when i istantiate the component in my project i have some problems with the evaluation license. 

I have Quartus II 9.0 web edition and when i compile the project , the complier doesn't generate the pof file to program the fpga . Also the netlist for Modelsim isn't generate.  Is there a way to use flash ram without sopc builder?

[Altera_Forum]

so, Should i use max ii?

[Altera_Forum]

You can absolutely use the flash without SoPC builder. I've written several flash controllers in gateware. I just thought SoPC builder might be a quick way to validate that it was indeed functional. Quartus should still give you a time limited SOF file even without a valid NIOS license. 

 Jake