Connection Setup for JTAG - simplification

[fogl]

Hello everybody,

To use the JTAG on a MAX10 devices i should (according to UG-M10CONFIG) tie the JTAGEN and JTAG pins to either weak pull-up or pull-down.

Is this actually really necessary. Can i connect the JTAGEN to Vcc and leave all the JTAG pins floating?

Regards

Klemen

[BJona]

Hi,

Just one question, how would you configure the MAX 10 in this case?

[JohnT_Intel]

Hi,

May I know if you are enabling JTAG Pin Sharing? If no the JTAGEN pin can be use as USER I/O pin. You may refer to Table 26 of https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_config.pdf

[fogl]

Thank you for your reply. It seems my understanding of pin sharing option was not correct.

The JTAG pin sharing is disabled, so i will use JTAGEN pin as usual USER I/O pin. Can i in this case leave all JTAG pins floating, so no pull up/down resistor on JTAG lines are required?

I will use JTAG to configure the device.

Regards

[JohnT_Intel]

Hi,

I would recommend you to put the weak pull up and weak pull down resistor on the JTAG lines as this is needed for you to performed JTAG configuration initially. Without the resistor you will not be able to program the Max 10 device initially. Once you have programmed the On-Chip Flash then you may removed the resistor if you no longer need to use the JTAG connection.

[fogl]

Thank you for your reply.

So in this case i can also add the resistors to the JTAG dongle, so no additional components are needed on the PCB - so this should work?

Regards

[JohnT_Intel]

Hi,

Yes, but I still recommend you to put weak-pull down on TCK pin so that the device is working correctly and avoid noise detected by the device. Other pin can be left floating.

[fogl]

Ok, I will do that. Thank you for your comments :)

[JohnT_Intel]

I am glad that I am able to help you.

[migry_tech]

This really got me thinking.

FPGA pins tend to be limited, so it's not great if you have to dedicate pins for example to JTAG, as that's 4 less I/Os available.

So there is the pin JTAGEN, when high forces 4 I/O pins to be JTAG (TDI,TDO, TMS, TCK).

But the JTAGEN pn can be used as user I/O.

Or if JTAGEN=0 the 4 "JTAG" I/O can be used as normal I/O.

There is a config bit to "Enable JTAG pin sharing". I wonder what this does internally?

If as in your case you are using JTAGEN as user I/O, to use the JTAG pins, do you need to temporarily force JTAGEN high or is this unnecessary? Possible NO only if JTAG pin sharing is disabled???

If JTAG pin sharing is enabled then foir sure you need to force JTAGEN high during programming in order for the JTAG pins to work.

What I was working towards is that during "mission mode" operation, if JTAG pins were to toggle then the TAP (internal IP which is controlled by the JTAG pins) would operate and could possibly corrupt the programmed state of the device.

I used a chip where it was recommended (i.e. must do it) to pull the JTAG reset pin (TRST - which many chips have) low to hold the TAP in reset. The concern was that unintentional toggling of TCK and other JTAG pins could cause the device to go into test mode! Floating pins can in theory see false data depending upon whether there are wires close to other toggling wires (cross coupling).

So I am now thinking that if the "JTAG Pin Sharing" config bit is set to disabled, the JTAGEN pin is totally disconnected from the internal circuitry.

Also if "JTAG Pin Sharing" config bit is enabled it likely goes to the select of 4 muxes where the "A" inputs connect the pads to internal user I/O and the "B" inputs connect the pads to the internal JTAG circuitry.

More assumptions, if "JTAG Pin Sharing" is enabled and JTAGEN is low (for user I/O pins), the the internal connections to the TAP (from the "JTAG" pads) will be forced to a known safe value (probably '0').

=> So IF you have the above scenario, I suspect that you can get away with no external pull ups/downs on the JTAG pins since it will be managed internally.

"The JTAG pin sharing is disabled, so i will use JTAGEN pin as usual USER I/O pin. Can i in this case leave all JTAG pins floating, so no pull up/down resistor on JTAG lines are required?"

So in this case I agree that you need to use pull ups/downs on the dedicated JTAG pins to avoid any operation of the TAP during "mission mode" by pulling them to a known inactive state.

[JohnT_Intel]

Hi,

I would still recommend you to put TCK to weak pull-down so that we can avoid unwanted noise during power up as during power up, the JTAG pin will be set as dedicated pin. This will avoid any unwanted configuration issue through internal flash.

The JTAG pin will only be set to normal IO pin when it enter usermode and JTAG pin sharing is enabled.