Programmable Devices
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Cyclone 10 GX Configuration Time

HamzahS
新規コントリビューター I
1,199件の閲覧回数

Hi,

 

We have a custom made PCB with a Cyclone 10 GX FPGA that uses ASx4 configuration scheme. Everything works fine except the boot (FPGA entering User Mode) time. It's too long to pass our requirements. It takes around:

1- Fast POR: 220 ms

2- Standard POR: 360 ms

 

We would like to get it under 100 ms even if it gets to changing design and configuration scheme.

 

Kindly advise on whether this is possible or not, and how.

 

Thanks,

-Sulaiman

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1 解決策
YuanLi_S_Intel
従業員
1,186件の閲覧回数

You may refer to cyclone 10 gx for the estimated configuration time for every configuration scheme.

https://www.intel.com/content/www/us/en/docs/programmable/683828/current/minimum-configuration-time-estimation.html


You might need to consider PS configuration scheme if you are looking for time with less than 100 ms.


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3 返答(返信)
YuanLi_S_Intel
従業員
1,187件の閲覧回数

You may refer to cyclone 10 gx for the estimated configuration time for every configuration scheme.

https://www.intel.com/content/www/us/en/docs/programmable/683828/current/minimum-configuration-time-estimation.html


You might need to consider PS configuration scheme if you are looking for time with less than 100 ms.


HamzahS
新規コントリビューター I
1,178件の閲覧回数

Could this be done without using another FPGA or CPLD?

YuanLi_S_Intel
従業員
1,170件の閲覧回数

For PS configuration, you need a CPLD or a processor for that.


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