Cyclone 4 Jtag - with VHDL

[Altera_Forum]

Hi,:(Hi, 

Can any one explain or give an example how to connect to Altera inside JTAG to be able to read values myself? Thanks, Roee

[Altera_Forum]

I don't have an example at hand, but you can instantiate a megawizard generated module or probably instantiate the primitive (cyclonev_jtag) directly. Then you need to generate the JTAG sequence to read it. If you don't have software to do this you can write an SVF to set the scan register to user1/user2. 

 Using the altsource_probe is probably the easiest way.

[Altera_Forum]

Hi Peter, 

Does the megawizard generate JTAG (VHDL) - that I can read and change?, or the Jtag of chip is a closed black box, which I can only interruct just with the Magawizard? what is SVF? Can I write a FORM - in visual c++ or C sharp, and inrteruct with DLL (FTDI), and this is changing the chip Jtag? Does any one has any VHDL example for this? Thanks, Roee

[Altera_Forum]

The megawizard generates VHDL or Verilog, but it's just a wrapper around a primitive which you can't change. You can hook up your own logic to the user port of the tap controller. 

 SVF is a file format (Serial Vector Format) which you can use to specify data to scan into the data and instruction registers.  You can also write patterns to the FTDI directly, but this is at a even lower level and you have to generate bit sequences to toggle tdi/tms to traverse the tap controller states.  But as I said altsource_probe is probably the easiest way. Come to think of it you can actually see how this is done in some of the open source bitcoin miners. Take a look at virtual_wire.v in git://github.com/progranism/Open-Source-FPGA-Bitcoin-Miner.git. You can find tcl functions to read the probe in jtag_comm.tcl.

[Altera_Forum]

Unfortunately you didn't tell at all what you want to achieve. "changing the chip Jtag" is a bit vague. For the basic features of Altera JTAG topology, you can review the Virtual JTAG user guide. http://www.altera.com/literature/ug/ug_virtualjtag.pdf

[Altera_Forum]

Ok, 

I am trying to make a form (visual C or C sharp), with buttons that enables me to run different VHDL codes on DE2-115. For this I want to use the JTAG interface (and not UART etc.) So Far I understand that I can use the built in FTDI chip on board DE2-115, with PC- DLL file to communicate  The Red leds are only to see that the board is working (binary counter at slow frequency)  Changing message from time to time (because of some progress:))  Now - Jtag primitive that I have took from LPM - seems to work opposite ?! Seen that TDI - > Is an output? and TCK as also output (and not input as I expect) So I have connected shift register -> Serial in, parallel out to see the actual bits out  But when running I see all LEDS are on? - why? is the JTAG active all the time? from where does it get any clock? Again I expect to see according to my DATA IN (later via FTDI DLL) the green led in some state  See attached file   Thanks, Roee

[Altera_Forum]

I'm more confused now than when I replied to your initial post from which I thought you wanted to read/write registers within your design through jtag. 

 I'm also uncertain what you mean by different vhdl codes? Do you mean that you would like to load different fpga images from your own program? If so you don't need the user jtag register or the altsource/probes. You should rather look into embedded programming using svf or stapl. If your goal is simply to have a dialog box to choose which fpga image to load you could simply fork out a small shell to run quartus_pgm from within your program. Assuming this is running on a x86 pc.

[Altera_Forum]

--- Quote Start ---  I'm more confused now than when I replied to your initial post from which I thought you wanted to read/write registers within your design through jtag.  I'm also uncertain what you mean by different vhdl codes? Do you mean that you would like to load different fpga images from your own program? If so you don't need the user jtag register or the altsource/probes. You should rather look into embedded programming using svf or stapl. If your goal is simply to have a dialog box to choose which fpga image to load you could simply fork out a small shell to run quartus_pgm from within your program. Assuming this is running on a x86 pc.  --- Quote End ---   Hi, Did overcome most of my problems with help. Now some more questions please: I have a code (VHDL) - that I can send JTAG commands - and see them in 7 segment on board (and leds)  But for this I need to use quartus_stp (signal tap program) and CYGWIN program, Can I send the commands directly (though FTDI.DLL) - without using quartus_stp program and CYGWIN program, Or by using general windows command prompt instead Thanks, Roee

[Altera_Forum]

I guess you're using quartus_stp to read/write the altprobes/altsource now like it's done in the bitcoin miner. 

 It's possible, but requires quite a bit of work like I've described earlier. However, you should be able to run quartus_stp without cygwin even though I seldom use Windows.