In my project (with a Cyclone IV EP4CE10 FPGA) I am using only the digital IO pins for input and output. The inside circuit (described with schematic and VHDL), should use only combinator and sequential circuit (Flip Flop and gates).
In this case, can I avoid to power supply the analog and PLL pins (VCCA1, VCCA2, VCC_PLL1, VCC_PLL2, GNDA)?
Can I leave these pins disconnected?
Hi CLa R ,
VCCA - Analog power for PLLs[1..8]. All VCCA pins must be powered and all VCCA pins must be powered up and powered down at the same time even if not all the PLLs are used.
VCCD_PLL - Digital power for PLLs[1..8]. The designer must power up these pins, even if the PLL is not used.
If you are not using any logic inside the FPGA ,still you need to connect the recommendation provided in the PCG