Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20704 Discussions

Cyclone V: How to access AS EPCS if booted from HPS?

Altera_Forum
Honored Contributor II
‎12-12-2017 12:09 PM
1,373 Views

I have dev-board with Cyclone V ES. It has EPCS for AS bitstream loading. I'm loading bitstream from HPS and therefore EPCS is not used for bitstream. I want to use this EPCS as a data storage from FPGA side. And i cannot find the way how to access EPCS. ASMIBLOCK IP expects AS mode, while i'm using PS. If i try to define EPCS pins in QSF then i get error about pins already defined for other functions.  

Is there a way to access this EPCS from FPGA?
0 Kudos

Link Copied

1 Reply
Altera_Forum
Honored Contributor II
‎12-12-2017 03:37 PM
626 Views

Unfortunately, Cyclone V is not very flexible in this respect. Whilst Cyclone IV does give direct access to the EPCS pins in user mode, Cyclone V does not. 

 

Cyclone V does support remote system upgrades which allows reprogramming of the EPCS, attached to the dedicated pins, whilst in service. However, this is implemented using dedicated circuitry and state machine logic for doing that and only that. 

 

Cheers, 

Alex
0 Kudos
Copy link
Reply

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.