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Cyclone V PCIE reference clock OCT

Lilian_61
New Contributor I
350 Views

Hi,

I am using Cyclone V FPGA (5CGXFC4C), I have some questions about the PCIE reference clock (W6,V6) OCT setting.

There are two variations for On Chip Termination:

- Embedded inside FPGA.

- On board termination.

I want to figure out below details with you. 

#1.Is the PCIe reference OCT enabled by default? Namely the OCT default status is "on" ?

#2.If the OCT default status is "off", and I want to enable this OCT function. Should I do the setting in Assignment Editor like below?

Lilian_61_0-1658219933041.png

I am looking forward to your reply. Thanks!

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skbeh
Employee
335 Views

Hi 

1) PCIe reference OCT is not enabled by default.

2) Yes you are right, you can enable the OCT as the Assignment Editor shown in your screenshot.


Page 12 of application below has some Cyclone V PCIe example designs that you can refer to.

https://www.intel.com/content/www/us/en/docs/programmable/683541/current/software-requirements.html


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2 Replies
skbeh
Employee
336 Views

Hi 

1) PCIe reference OCT is not enabled by default.

2) Yes you are right, you can enable the OCT as the Assignment Editor shown in your screenshot.


Page 12 of application below has some Cyclone V PCIe example designs that you can refer to.

https://www.intel.com/content/www/us/en/docs/programmable/683541/current/software-requirements.html


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Lilian_61
New Contributor I
328 Views

Thanks for your knowledge!That's very useful to me!

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