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Cyclone V PLL desired output frequency

Altera_Forum
Honored Contributor II
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Hi! I have a problem using Altera PLL V 12.1 megafunction for Cyclone V.  

 

I choosed integer type of PLL and typed 20 MHz for Reference Clock Frequency. 

After that I choosed two output clock, outclk0 and outclk1. In desired outclk0 frequency I typed 50 MHz, and that works fine. 

In desired outclk1 frequency I typed 0.2 MHz, because I needed a frequency 200 KHz.  

But PLL told me that minimum frequency that it can reach is 1.171875 MHz.  

I tried another frequencies, and can tell that 0.6 MHz is last freq that PLL can synthesize correctly. 

 

I also tried fractional PLL. GUI told me that minimum input frequency for fractional PLL is 50 MHz, so I choosed 50 MHz and 

also tried to achieve desired outclk1 frequency 0.2 MHz. Another fail, ~0.78 MHz was the frequency which PLL could synthesize. 

 

I worked for a 1 year with Cyclone IV and it's PLL can achieve such requirements without problem. 

 

Can anyone tell me, is it a bug? Or I need to synthesize freqeuncies lower than 0.6 MHz only using VHDL/verilog code (counters), or maybe I can cascade PLL for that reason? 

What is a better way of doing it?
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Altera_Forum
Honored Contributor II
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The PLLs are not really designed to operate an output at such a low frequency. If it is a clock signal you need to provide on an output, you can generate it from a higher frequency using a counter, and if you need to use it inside the FPGA you can use a clock enable, also with a higher frequency clock.

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Altera_Forum
Honored Contributor II
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Thanks a lot for your answer!!!  

 

Of course it is not a problem to generate required frequency using counter. 

Only one question remains, why I could generate such low frequency in Cyclone IV PLL? 

I mean it is comfortable). Why this ability was removed in Cyclone V?
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Altera_Forum
Honored Contributor II
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The feature abandoned in Cyclone V is "post-scale counter cascading". I guess, it has been removed in favour of other more essential features. Low frequency post-scalers can be easily implemented in logic fabric, in so far the cascading feature can replaced without problems. Of course it's annoying if your design needs rework because it used cascading.

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Altera_Forum
Honored Contributor II
786 Views

Thank you for your answer! 

 

Anyway Cyclone V is better than Cyclone IV, so I have to rewrite SDC file and write a counter in order to generate desired low frequency.
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